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path: root/src/southbridge/intel/lynxpoint/chip.h
AgeCommit message (Expand)Author
2020-04-04src/southbridge: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2019-08-21southbridge/intel: Tidy up preprocessor and headersKyösti Mälkki
2018-11-16sb/intel/lynxpoint: Generate the ACPI FADT with a common functionTristan Corrick
2018-11-01src: Add missing include <stdint.h>Elyes HAOUAS
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2014-07-11intel/lynxpoint: Allow to always route USB3 ports to XHCIStefan Reinauer
2014-07-04intel/lynxpoint: Add SATA DEVSLP disable optionMarc Jones
2013-12-21lynxpoint: Add configuration option for SATA gen3 DTLE registersShawn Nematbakhsh
2013-12-21lynxpoint: Add devicetree config option to force enable ASPMDuncan Laurie
2013-12-21lynxpoint: me: Support ICC clock enables messageDuncan Laurie
2013-04-01lynxpoint: Basic configuration of SerialIO devicesDuncan Laurie
2013-03-21haswell/lynxpoint: Use new PCH/PM helper functionsDuncan Laurie
2013-03-14lynxpoint: Update device IDs and clock gating setupDuncan Laurie
2013-03-14haswell: Add initial support for Haswell platformsAaron Durbin
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