index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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path:
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src
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southbridge
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intel
/
lynxpoint
/
pcie.c
Age
Commit message (
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Author
2018-04-20
pci: Move inline PCI functions to pci_ops.h
Patrick Rudolph
2017-07-10
southbridge/intel/lynxpoint: Fix undefined behavior
Ryan Salsamendi
2017-07-02
southbridge/intel/lynxpoint: Fix undefined behavior
Ryan Salsamendi
2016-12-06
PCI ops: Define read-modify-write routines globally
Kyösti Mälkki
2016-02-23
southbridge/intel/lynxpoint: Use common gpio.c
Patrick Rudolph
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2013-12-21
haswell: Misc updates from 1.6.1 ref code
Duncan Laurie
2013-12-21
lynxpoint: Add devicetree config option to force enable ASPM
Duncan Laurie
2013-12-05
lynxpoint: enable clock gating
Aaron Durbin
2013-12-05
lynxpoint: implement additional programming steps
Stefan Reinauer
2013-12-05
lynxpoint: disable pcie devices based on config
Aaron Durbin
2013-12-02
lynxpoint: move all pcie device handling to pcie.c
Aaron Durbin
2013-08-01
intel/lynxpoint: remove explicit pcie config accesses
Kyösti Mälkki
2013-03-14
lynxpoint: Update device IDs and clock gating setup
Duncan Laurie
2013-03-14
haswell: Add initial support for Haswell platforms
Aaron Durbin