index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
southbridge
/
intel
/
lynxpoint
/
smihandler.c
Age
Commit message (
Expand
)
Author
2016-07-15
southbridge/intel/lynxpoint: use common Intel ACPI hardware definitions
Aaron Durbin
2016-01-07
Correct some common spelling mistakes
Martin Roth
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-01-04
smihandler.c: Fix doxygen errors in southbridge_smi_handler
Martin Roth
2014-12-02
Replace hlt with halt()
Patrick Georgi
2014-07-04
intel/lynxpoint: Use separate SMI callback for USB XHCI routing
Duncan Laurie
2013-12-21
lynxpoint: Route all USB ports to XHCI in finalize step
Duncan Laurie
2013-12-21
lynxpoint: Move USB SMI sleep code to separate USB files
Duncan Laurie
2013-11-25
lynxpoint: Enable USB clock gating, late setup, and sleep prep
Duncan Laurie
2013-03-22
x86: Unify arch/io.h and arch/romcc_io.h
Stefan Reinauer
2013-03-21
haswell/lynxpoint: Use new PCH/PM helper functions
Duncan Laurie
2013-03-18
haswell: Use SMM Modules
Aaron Durbin
2013-03-14
haswell: remove GPIO60 memory reset gate on S3 transition
Duncan Laurie
2013-03-14
haswell: remove explicit pcie config accesses
Aaron Durbin
2013-03-14
haswell: Add initial support for Haswell platforms
Aaron Durbin