coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-05-01	sb/intel/lynxpoint: Fix 16-bit read/write PCI_COMMAND register	Elyes HAOUAS
2020-04-05	Drop explicit NULL initializations from `device_operations`	Elyes HAOUAS
2020-04-04	src/southbridge: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2019-11-09	arch/x86: Replace some __SMM__ guards	Kyösti Mälkki
2019-03-21	{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()	Subrata Banik
2019-03-04	device/mmio.h: Add include file for MMIO ops	Kyösti Mälkki
2019-03-01	device/pci: Fix PCI accessor headers	Kyösti Mälkki
2018-12-03	sb/intel/lynxpoint/usb_{e,x}hci.c: Don't use device_t	Elyes HAOUAS
2016-07-15	southbridge/intel/lynxpoint: use common Intel ACPI hardware definitions	Aaron Durbin
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-02-15	x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer	Kevin Paul Herbert
2014-02-06	usbdebug: Move under drivers/usb	Kyösti Mälkki
2013-12-21	lynxpoint: Move USB SMI sleep code to separate USB files	Duncan Laurie
2013-11-25	lynxpoint: Enable USB clock gating, late setup, and sleep prep	Duncan Laurie
2013-07-01	usbdebug: Drop duplicates of EHCI BAR relocation code	Kyösti Mälkki
2013-06-14	lynxpoint: Fix PCI IDs for EHCI	Kyösti Mälkki
2013-03-14	haswell: Add initial support for Haswell platforms	Aaron Durbin