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AgeCommit message (Expand)Author
2019-12-20{drivers,southbridge}: Replace min() with MIN()Elyes HAOUAS
2019-12-19src: Remove unused 'include <arch/cpu.h>'Elyes HAOUAS
2019-12-19src/southbridge: Remove unused <stdlib.h>Elyes HAOUAS
2019-12-19src: Remove unused 'include <halt.h>'Elyes HAOUAS
2019-12-18src: Remove unused 'include <pc80/mc146818rtc.h>'Elyes HAOUAS
2019-12-14Revert "{northbridge,soc,southbridge}: Don't use both of _ADR and _HID"Nico Huber
2019-12-14sb/intel/*: Remove romcc guardsArthur Heymans
2019-12-14bootblock: Provide some common prototypesKyösti Mälkki
2019-12-02src/: Remove g_ prefixes and _g suffixes from variablesPatrick Georgi
2019-11-29{northbridge,soc,southbridge}: Don't use both of _ADR and _HIDElyes HAOUAS
2019-11-29sb/intel/spi: Drop CAR_GLOBAL_MIGRATIONArthur Heymans
2019-11-26southbridge/intel/common/spi.c: Define __SIMPLE_DEVICE__Arthur Heymans
2019-11-26sb/intel/common/spi: Add Baytrail/Braswell supportArthur Heymans
2019-11-25cpu/intel/slot_1: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-25sb/intel/i82801ix: Update comment on default decoded IO rangesArthur Heymans
2019-11-22sb/intel/ibexpeak: Decode more LPC IO rangesArthur Heymans
2019-11-22sb/i82801ix: Use macros instead of hard-coded IDsFelix Singer
2019-11-21nb/sb/cpu: Drop Intel Rangeley supportArthur Heymans
2019-11-18sb/intel/bd82x6x: Handle enabling of GbENico Huber
2019-11-18nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-18sb/intel/bd82x6x: Make the pch_enable_lpc hook optionalArthur Heymans
2019-11-18nb/intel/sandybridge: Make the mainboard_rcba_config hook optionalArthur Heymans
2019-11-18sb/intel/common: Properly guard USB debugArthur Heymans
2019-11-16sb/intel/i82801gx: Only include SPI code with SPI boot devicesArthur Heymans
2019-11-15nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-15nb/intel/i945: Initialize console in bootblockArthur Heymans
2019-11-15nb/intel/i945: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-14sb/intel/i82801gx: Don't setup CIR when the northbridge is x4xArthur Heymans
2019-11-14sb/intel/i82801jx: Move early sb init to a common placeArthur Heymans
2019-11-14sb/intel/i82801gx: Add common early codeArthur Heymans
2019-11-13sb/intel/i82801gx,ix,jx: Move HAVE_SMI_HANDLER conditionalKyösti Mälkki
2019-11-13sb/intel/i82801dx,ix: Replace SMM_ASEG conditionalKyösti Mälkki
2019-11-13sb/intel: Remove ENABLE_ACPI_MODE_IN_COREBOOTKyösti Mälkki
2019-11-13sb/intel/i82801jx: Enable upper 128bytes of CMOSArthur Heymans
2019-11-13sb/intel/i82801gx: Add a function to set up BARArthur Heymans
2019-11-13intel/82801dx,ix: Rename SMM_ASEG functionsKyösti Mälkki
2019-11-12sb/intel/i82801jx: Add common code for LPC decodeArthur Heymans
2019-11-12sb/intel/i82801gx: Add common LPC decode codeArthur Heymans
2019-11-10sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbolArthur Heymans
2019-11-10sb/intel/common: Make COMMON_RESET optionalArthur Heymans
2019-11-10sb/intel/common: Make linking rtc.c conditionalArthur Heymans
2019-11-09arch/x86: Replace some __SMM__ guardsKyösti Mälkki
2019-11-09ELOG: Avoid some preprocessor useKyösti Mälkki
2019-11-09ELOG: Introduce elog_gsmi variantsKyösti Mälkki
2019-11-08sb,soc/intel: Reduce preprocessor use with ME debuggingKyösti Mälkki
2019-11-08arch/x86: Drop some __SMM__ guardsKyösti Mälkki
2019-11-04sb/intel: Use defined CONFIG_HPET_ADDRESSElyes HAOUAS
2019-11-04sb/intel/lynxpoint: Use sb/intel/common/platform.aslArthur Heymans
2019-11-04mb/*/*{bd82x6x/ibexpreak}: Use sb/intel/common/acpi/platform.aslArthur Heymans
2019-11-04sb/intel/common/platform.asl: Remove setting unused GNVSArthur Heymans