| Age | Commit message (Expand) | Author |
|---|
| 2008-10-29 | Support for the Intel ICH7 southbridge. | Stefan Reinauer |
| 2008-09-03 | Tidy up identifiers, per Uwe's suggestion. Trivial. | Ed Swierk |
| 2008-08-25 | This patch adds PCI device IDs for the Intel EP80579 Integrated Processor, | Ed Swierk |
| 2008-08-25 | This patch modifies the Intel 3100 southbridge code to recognize the | Ed Swierk |
| 2008-05-07 | Implement GPIO configuration routines for the Intel 3100 southbridge, | Ed Swierk |
| 2008-04-30 | By default, the Intel 3100 LPC interface enables only I/O range 0x3f8 | Ed Swierk |
| 2008-04-06 | This patch halts the tco timer early in the boot process on all ICH series so... | Joseph Smith |
| 2008-04-01 | Setting an integrated southbridge device (like SATA or USB2.0) to | Ed Swierk |
| 2008-04-01 | Remove i82801DB files that I meant to delete in r3206. | Joseph Smith |
| 2008-04-01 | Tiny style fix for consistency (trivial). | Ed Swierk |
| 2008-04-01 | Removal of i82801DB (ICH4) | Joseph Smith |
| 2008-04-01 | The early init code of several Intel southbridge chipsets calls | Ed Swierk |
| 2008-03-30 | Like other Intel chipsets, the Intel 3100 has a TCO timer that reboots | Ed Swierk |
| 2008-03-16 | Here is an updated patch addressing most of Uwe's and Peter's ... | Ed Swierk |
| 2008-01-18 | Rename almost all occurences of LinuxBIOS to coreboot. | Stefan Reinauer |
| 2008-01-18 | Please bear with me - another rename checkin. This qualifies as trivial, no | Stefan Reinauer |
| 2007-11-30 | Improve support for the Intel 82371FB/SB/AB/EB/MB southbridge(s): | Uwe Hermann |
| 2007-11-29 | Restructure/rename/comment a few 82371XX-related PCI IDs (trivial). | Uwe Hermann |
| 2007-11-07 | Add initial support for all known ICH* southbridges to the | Uwe Hermann |
| 2007-11-07 | Add PCI IDs for most Intel southbridges of the 82801 series | Uwe Hermann |
| 2007-11-04 | Restructure the PCI IDs list for the ICH* chipsets from ICH/ICH0 up to | Uwe Hermann |
| 2007-10-30 | Various fixes and improvements of the 82801xx code. | Joseph Smith |
| 2007-10-24 | smaller changes to silence build warnings. (trivial) | Stefan Reinauer |
| 2007-10-24 | Ever wondered where those "setting incorrect section attributes for | Stefan Reinauer |
| 2007-10-01 | Thee lines in i82801xx_pci.c need to be removed. They cause the | Joseph Smith |
| 2007-06-19 | Various minor cosmetics and coding style fixes (trivial). | Uwe Hermann |
| 2007-06-14 | Small bugfix in i82801xx_lpc.c. | Corey Osgood |
| 2007-06-14 | This patch adds support for the Intel i82810 northbridge and various i82801xx | Corey Osgood |
| 2007-06-03 | Intel 82371EB: Some code simplifications (trivial). | Uwe Hermann |
| 2007-05-29 | Intel 82371EB: Add IDE init support. | Uwe Hermann |
| 2007-05-27 | Init for the Intel 82371EB southbridge: make all ROM/BIOS regions | Uwe Hermann |
| 2007-05-03 | Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB, | Uwe Hermann |
| 2006-12-28 | A patch to add initial support for the i82801db southbridge based | Jon Dufresne |
| 2006-12-14 | In the file mainboard/intel/i82801dbm/i82801dbm.c the variable | Jon Dufresne |
| 2006-12-14 | In src/southbridge/intel/i82801ca, first the smbus registers are mapped at i/o | chn |
| 2006-11-05 | Use the canonical name of the vendors/devices and the | Uwe Hermann |
| 2006-08-23 | Uwe Hermann: | Stefan Reinauer |
| 2006-08-04 | final rename orgy. sorry for the inconvenience. This should fix it again | Stefan Reinauer |
| 2006-08-04 | ouch. it's 8_2_371. I'll fix it. This commit breaks compilation | Stefan Reinauer |
| 2006-08-04 | rename southbridge i440bx to its actual name i8371eb | Stefan Reinauer |
| 2006-07-30 | - Fix some copy bugs and thinkos in the i440bx SMbus | Richard Smith |
| 2006-07-24 | add framework for i440bx chipset | Richard Smith |
| 2006-04-06 | interesting behavior, i thought svn could do moves. | Stefan Reinauer |
| 2006-04-06 | break the tree really quick due to svn restrictions, next commit fill fix it | Stefan Reinauer |
| 2005-09-21 | Bug fixes: read all 16 bits of DMA configuration; set up NMI/SERR handling in... | Steven J. Magnani |
| 2005-09-21 | Bug fixes: read all 16 bits of DMA configuration; set up NMI/SERR handling in... | Steven J. Magnani |
| 2005-09-21 | Bug fix: enable secondary IDE only if enable_b is set. | Steven J. Magnani |
| 2005-09-21 | Bug fix: enable secondary IDE only if enable_b is set. | Steven J. Magnani |
| 2005-09-21 | Rewrite i82801er_enable to do nothing if device does not have an enable/disab... | Steven J. Magnani |
| 2005-09-21 | Rewrite i82801dbm_enable to do nothing if device does not have an enable/disa... | Steven J. Magnani |
