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2009-10-26Kontron 986LCD-M updateStefan Reinauer
- run ACPI code through preprocessor so we get the same values as the C code - fix PCIe x16 slot - fix ICH7 Azalia/HDA driver - SMI/GNVS update security fix (only allow struct pointer update once) - ACPI updates - IDE driver fixes - add cmos options for disabling onboard ethernet and controlling system fan Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4861 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-24s/object-y/obj-y/ in two southbridges, since otherwise kbuild will not pick ↵Stefan Reinauer
up the files Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4834 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-23drop a lot of dead code, including an old winbond southbridge from our removedStefan Reinauer
ppc port, some ambiguous use of CONFIG_IDE and an unused ide driver (we dropped the filesystems already to be used with it) (somewhat trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4828 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-09This change allows us to see the spd on the s850, finally. Ronald G. Minnich
There is an i2c mux out there. We found it using a user level program that, as usual, began by inverting all gpios until we found out what we needed to know. In the end, we just set up the GPIOs as the factory bios does. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4755 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-09Remove default n statements to simplify .config and ldoptions files.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4753 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-09More kconfig cleanups:Uwe Hermann
- Use "default n" for all components that shall be "select"ed. - Use "0x0" instead of "0" for hex variables for clarity and to reduce the risk of people passing integer instead of hex values to such variables. - Add TODO comments for boards that have irq_tables.c but don' set CONFIG_HAVE_PIRQ_TABLE = 1. Someone with the hardware should test enabling. - ASUS M2V-MX SE doesn't have irq_tables.c so don't define IRQ_SLOT_COUNT in its Kconfig file. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4749 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-04The new CBFS based build system requires the whole ROM to be accessibleUwe Hermann
in very early stages, otherwise the boot may hang like this because the CBFS headers cannot be found/accessed: Uncompressing coreboot to RAM. Jumping to image. Check CBFS header at fffedfe0 magic is ffffffff ERROR: No valid CBFS header found! CBFS: Could not find file fallback/coreboot_ram Jumping to image. This patch enables full ROM access on all 440BX boards right after the serial init (and before CBFS headers are parsed). Build-tested and runtime-tested on ASUS P2B-F. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4721 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-25some progress on kconfig:Patrick Georgi
- northbridges are done - southbridges are done - Intel CPUs are done, with a design that the board only has to specify the socket it has, and the CPUs are pulled in automatically. There is some more cleanup possible in that area, but I'll do that later - a couple more mainboards compile: - intel/eagleheights - intel/jarrell - intel/mtarvon - intel/truxton - intel/xe7501devkit - sunw/ultra40 - supermicro/h8dme - tyan/s2850 - tyan/s2875 - via/epia - via/epia-cn - via/epia-m - via/epia-m700 - via/epia-n - via/pc2500e (PPC not considered, probably overlooked something) All of them only _build_, but some options are probably completely wrong. To be fixed later Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28This patch adds VGA and PS/2 Keyboard/mouse support to the already existing ↵Arnaud Maye
intel truxton (ep80579) dev board. This patch tries to improve the pcie portA configuration. The Matrox G550e PCIe gfx card shipped along with the dev board is supported. Signed-off-by: Arnaud Maye <arnaud.maye@4dsp.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4615 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28Add kconfig support for all Intel 82810 (i810) boards.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4613 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28Silence unneeded #warnings, change to code comments (trіvial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4607 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-25Various Kconfig and Makefile.inc fixes and cosmetics.Uwe Hermann
- Whitespace fixes, remove trailing whitespace, use TABs for identation (except in Kconfig "help" lines, which start with one TAB and two spaces as per Linux kernel style) - Kconfig: Standardize on 'bool' (not 'boolean'). - s/lar/cbfs/ in one Kconfig help string. - Reword various Kconfig menu entries for a more usable and consistent menu. - Fix incorrect comment of NO_RUN in devices/Kconfig. - superio/serverengines/Kconfig: Incorrect config name. - superio/Makefile.inc: s/serverengine/serverengines/. - superio/intel/Kconfig: s/SUPERIO_FINTEK_I3100/SUPERIO_INTEL_I3100/. - mainboard/via/vt8454c/Kconfig: Fix copy-paste error in help string. - mainboard/via/epia-n/Kconfig: Fix "bool" menu text. - console/Kconfig: Don't mention defaults in the menu string, kconfig already displays them anyway. - Kill "Drivers" menu for now, it only confuses users as long as it's emtpy. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4567 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-12drop extra whitespace at end of line for i945 + ICH7 (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4538 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-12Kconfig!Patrick Georgi
Works on Kontron, qemu, and serengeti. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> tested on abuild only. Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-05Add some more CONFIG_* prefixes that were missing.Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4497 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21Intel ICH7 updatesStefan Reinauer
- code restructuring (move ich7 out of i945) - ACPI fixes - major SMI handler updates - make sure SMBus lives where we expect it - try to get usb debug working Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4456 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-20Rename some preprocessor symbols. I have no idea whyPatrick Georgi
those symbols were left alone before, after this, they're somewhat more in line with the rest of the tree. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4442 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-02Move the v3 resource allocator to v2.Myles Watson
Major changes: 1. Separate resource allocation into: A. Read Resources B. Avoid fixed resources (constrain limits) C. Allocate resources D. Set resources Usage notes: Resources which have IORESOURCE_FIXED set in the flags constrain the placement of other resources. All fixed resources will end up outside (above or below) the allocated resources. Domains usually start with base = 0 and limit = 2^address_bits - 1. I've added an IOAPIC to all platforms so that the old limit of 0xfec00000 is still there for resources. Some platforms may want to change that, but I didn't want to break anyone's board. Resources are allocated in a single block for memory and another for I/O. Currently the resource allocator doesn't support holes. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4394 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-01Add support for the Intel Eagle Heights development board.Thomas Jourdan
Signed-off-by: Thomas Jourdan <thomas.jourdan@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4392 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30This patch unifies the use of config options in v2 to all start with CONFIG_Stefan Reinauer
It's basically done with the following script and some manual fixup: VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC` for VAR in $VARS; do find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \; done Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-05die() does never return. Annotate it as such.Carl-Daniel Hailfinger
Any endless loop after die() can be eliminated. Dereferencing a NULL pointer is bad. die() instead. Replace endless loops with die(). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4340 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03Revert "CMOS: Add set_option and rework get_option."Luc Verhaegen
This reverts commit eb7bb49eb5b48c39baf7a256b7c74e23e3da5660. Stepan pointed out that "s" means string, which makes the following statement in this commit message invalid: "Since we either have reserved space (which we shouldn't do anything with in these two functions), an enum or a hexadecimal value, unsigned int seemed like the way to go." Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Luc Verhaegen <libv@skynet.be> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4335 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03CMOS: Add set_option and rework get_option.Luc Verhaegen
To ease some of my debugging pain on the unichrome, i decided i needed to move FB size selection into cmos, so i could test a size and then reset it to the default after loading this value so that the next reboot uses the (working) default again. This meant implementing set_option in parallel to get_option. get_option was then found to have inversed argument ordering (like outb) and passing char * and then depending on the cmos layout length, which made me feel quite uncomfortable. Since we either have reserved space (which we shouldn't do anything with in these two functions), an enum or a hexadecimal value, unsigned int seemed like the way to go. So all users of get_option now have their arguments inversed and switched from using ints to unsigned ints now. The way get_cmos_value was implemented forced us to not overlap byte and to have multibyte values be byte aligned. This logic is now adapted to do a full uint32_t read (when needed) at any offset and any length up to 32, and the shifting all happens inside an uint32_t as well. set_cmos_value was implemented similarly. Both routines have been extensively tested in a quick separate little program as it is not easy to get this stuff right. build_opt_tbl.c was altered to function correctly within these new parameters. The enum value retrieval has been changed strol(..., NULL, 10) to stroul(..., NULL, 0), so that we not only are able to use unsigned ints now but so that we also interprete hex values correctly. The 32bit limit gets imposed on all entries not marked reserved, an unused "user_data" field that appeared in a lot of cmos.layouts has been changed to reserved as well. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4332 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-29enable/disable IDE 0/1 (Primary/Secondary) interfaces on the i82801xx ↵Joseph Smith
southbridge. Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4324 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26ops can not be const because of the pci conf1/conf2 hackery we do. trivialStefan Reinauer
patch, just removes the warnings like coreboot-v2/src/southbridge/intel/i82801xx/i82801xx_ac97.c:73: warning: initialization discards qualifiers from pointer target type Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4302 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-13Oops forgot small part. Set up PIRQs in mainboard Config.lb for IP1000 and ↵Joseph Smith
RM4100 instead of using the ones in i82801xx_lpc.c. Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4278 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-11This patch adds high table support to qemu. It was already added toMyles Watson
src/northbridge/intel/i440bx/ but not to src/cpu/emulation/qemu-x86/northbridge.c It also adds a driver for the ISA device that is found when using 0.9.1 If you look in a log without this patch you won't find the RTC init lines. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4269 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-02Assign PIRQs in mainboard Config.lb or use the default ones listed in ↵Joseph Smith
i82801xx_lpc.c. Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4251 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-02Run dos2unix on all files:Stefan Reinauer
find . -type f| grep -v svn | xargs dos2unix Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4250 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-02Trivial, update email address. Joseph Smith
Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4249 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-01This is a patch to use another IRQ besides IRQ12 to fix conflicts with i8042 ↵Joseph Smith
- PS/2 Mouse. Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4246 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-06(trivial) fix some warningsStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4076 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-13This, ladies and gentlement, is commit #4000.Stefan Reinauer
Use the (almost) same strict CFLAGS in v2 that we use on v3. And fix a few include files and missing prototypes. Also, fix up the Config-abuild.lb files to properly work for cross compiling. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4000 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-13ACPI implementation for i945, ICH7, Kontron 986LCD-MStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3999 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11This patch contains some significant updates to the i82801gx component and willStefan Reinauer
be required for a series of later patches. Roughly it contains: * fixed SMBus driver (was not compiled in before) * fixed S-ATA/P-ATA combination * Added warnings to drivers being called with a NULL dev->chip_info * Set subsystem ids for those boards that have none specified in Options.lb * Fix license headers. The code was originally released under GPL v2 but some files sneaked in with a v2 or later header. * some attempts to fix azalia/Intel HDA.. not working yet * clean up and fix pci bridge handling code * Add Config based GPI handling to LPC driver * Add HPET enable function * Enable clock gating where appropriate * first attempt at USB debug console support (not working yet) * Add required options to kontron board * many other minor changes Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3991 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-06* fix a minor power state issue in the ich7 smm handlerStefan Reinauer
* move mainboard dependent code into a mainboard SMI handler. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-28coreboot-v2: drop this ugly historic union name in v2 that was dropped in v3Stefan Reinauer
a long time ago. This will make it easier to port v2 boards forward to v3 at some point (and other things) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3964 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-20forgot to svn addStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3887 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-20Update Kontron boardStefan Reinauer
- use new features of the ich7 update - move rambase above 1M to avoid memory trashing through SMM relocation - enable superio HWM Update ICH7 driver - minor smi cosmetics (in progress) - add real ac97 driver - add real azalia driver - fix some interrupt issues - fix some sata issues - include Patrick's fix for _lpc.c Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-19First shot at factoring SMM code into generic parts and southbridge specificStefan Reinauer
parts. This should help to reduce the code duplication for Rudolf's K8/VIA SMM implementation... Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-06Drop #defines for registers that are not existant on the ICH7.Uwe Hermann
Also, fix BIOS_CNTL, which is 0xdc on ICH7. Build-tested with kontron/986lcd-m. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3733 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-06The enable_hpet() code in intel/i82801gx will not work with theUwe Hermann
ICH7 southbridge (but it might work with ICH4/ICH5 or so). The ICH7 needs a different init code. Drop the non-working code for now. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3732 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-02Trim down the list of southbridges supported by the i82801xx driverUwe Hermann
to only a set of reasonably similar ones, namely (for now) ICH0* - ICH6*, and C-ICH. All later ICH* southbridges (ICH7-ICH10) are _very_ different and were surely not working with this driver anyway (and there's no chance to support them reasonably with this driver without ending up in #ifdef hell). ICH7 now has an extra driver in svn, whether ICH8-ICH10 are similar enough to be supported by that ICH7 driver remains to be seen. This patch was informally acked by Stefan Reinauer <stepan@coresystems.de> on IRC. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3718 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-31Revert i945/ICH7 PCI IDs to be hard-coded numbers instead of #defines.Uwe Hermann
Build-tested on kontron_986lcd_m. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3715 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-29i945/ICH7: Use #defines from pci_ids.h (trivial).Uwe Hermann
Build-tested with the kontron/986lcd-m target. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-29Support for the Intel ICH7 southbridge.Stefan Reinauer
This includes an early SMI handler. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3701 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-03Tidy up identifiers, per Uwe's suggestion. Trivial.Ed Swierk
Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Ed Swierk <eswierk@arastra.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3563 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-25This patch adds PCI device IDs for the Intel EP80579 Integrated Processor,Ed Swierk
and renames some existing macros for clarity. Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3536 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-25This patch modifies the Intel 3100 southbridge code to recognize theEd Swierk
integrated LPC, SMBus, USB and SATA devices of the Intel EP80579 Integrated Processor. Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3535 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-05-07Implement GPIO configuration routines for the Intel 3100 southbridge,Ed Swierk
allowing you to specify per-mainboard GPIO settings. Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3290 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1