Age | Commit message (Expand) | Author |
2019-11-21 | nb/sb/cpu: Drop Intel Rangeley support | Arthur Heymans |
2019-11-18 | sb/intel/bd82x6x: Handle enabling of GbE | Nico Huber |
2019-11-18 | nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans |
2019-11-18 | sb/intel/bd82x6x: Make the pch_enable_lpc hook optional | Arthur Heymans |
2019-11-18 | nb/intel/sandybridge: Make the mainboard_rcba_config hook optional | Arthur Heymans |
2019-11-18 | sb/intel/common: Properly guard USB debug | Arthur Heymans |
2019-11-16 | sb/intel/i82801gx: Only include SPI code with SPI boot devices | Arthur Heymans |
2019-11-15 | nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans |
2019-11-15 | nb/intel/i945: Initialize console in bootblock | Arthur Heymans |
2019-11-15 | nb/intel/i945: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans |
2019-11-14 | sb/intel/i82801gx: Don't setup CIR when the northbridge is x4x | Arthur Heymans |
2019-11-14 | sb/intel/i82801jx: Move early sb init to a common place | Arthur Heymans |
2019-11-14 | sb/intel/i82801gx: Add common early code | Arthur Heymans |
2019-11-13 | sb/intel/i82801gx,ix,jx: Move HAVE_SMI_HANDLER conditional | Kyösti Mälkki |
2019-11-13 | sb/intel/i82801dx,ix: Replace SMM_ASEG conditional | Kyösti Mälkki |
2019-11-13 | sb/intel: Remove ENABLE_ACPI_MODE_IN_COREBOOT | Kyösti Mälkki |
2019-11-13 | sb/intel/i82801jx: Enable upper 128bytes of CMOS | Arthur Heymans |
2019-11-13 | sb/intel/i82801gx: Add a function to set up BAR | Arthur Heymans |
2019-11-13 | intel/82801dx,ix: Rename SMM_ASEG functions | Kyösti Mälkki |
2019-11-12 | sb/intel/i82801jx: Add common code for LPC decode | Arthur Heymans |
2019-11-12 | sb/intel/i82801gx: Add common LPC decode code | Arthur Heymans |
2019-11-10 | sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbol | Arthur Heymans |
2019-11-10 | sb/intel/common: Make COMMON_RESET optional | Arthur Heymans |
2019-11-10 | sb/intel/common: Make linking rtc.c conditional | Arthur Heymans |
2019-11-09 | arch/x86: Replace some __SMM__ guards | Kyösti Mälkki |
2019-11-09 | ELOG: Avoid some preprocessor use | Kyösti Mälkki |
2019-11-09 | ELOG: Introduce elog_gsmi variants | Kyösti Mälkki |
2019-11-08 | sb,soc/intel: Reduce preprocessor use with ME debugging | Kyösti Mälkki |
2019-11-08 | arch/x86: Drop some __SMM__ guards | Kyösti Mälkki |
2019-11-04 | sb/intel: Use defined CONFIG_HPET_ADDRESS | Elyes HAOUAS |
2019-11-04 | sb/intel/lynxpoint: Use sb/intel/common/platform.asl | Arthur Heymans |
2019-11-04 | mb/*/*{bd82x6x/ibexpreak}: Use sb/intel/common/acpi/platform.asl | Arthur Heymans |
2019-11-04 | sb/intel/common/platform.asl: Remove setting unused GNVS | Arthur Heymans |
2019-11-04 | sb/intel/i82801jx/nvs.h: include required header | Arthur Heymans |
2019-11-04 | sb/intel: Move 'smbus.asl' to common place | Elyes HAOUAS |
2019-11-01 | soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi | Subrata Banik |
2019-10-30 | sb/intel/common: Make linking pmbase.c conditional | Arthur Heymans |
2019-10-30 | sb/intel/common/Makefile: Use 'all' class to link files in all stages | Arthur Heymans |
2019-10-30 | src/southbridge: change "unsigned" to "unsigned int" | Martin Roth |
2019-10-28 | nb/intel/gm45: Add C_ENVIRONMENT_BOOTBLOCK support | Arthur Heymans |
2019-10-28 | src/southbridge: Use 'include <stdlib.h>' when appropriate | Elyes HAOUAS |
2019-10-28 | src: Remove unused '#include <cpu/cpu.h>' | Elyes HAOUAS |
2019-10-22 | sb/intel/i82801gx: Set FERR# Mux Enable only on mobile platforms | Arthur Heymans |
2019-10-22 | sb/intel/common/smihandler: Fix compilation on x86_64 | Patrick Rudolph |
2019-10-21 | src/{device,drivers,mb,nb,soc,sb}: Remove unused 'include <console/console.h>' | Elyes HAOUAS |
2019-10-21 | sb/lynxpoint: Fix 'dead increment' | Elyes HAOUAS |
2019-10-20 | mb/lenovo/x200: Add ThinkPad X301 as a variant | Bill XIE |
2019-10-18 | src: Remove unused include '<device/pci_ids.h>' | Elyes HAOUAS |
2019-10-17 | nb/intel/nehalem: use pmclib to detect S3 resume | Arthur Heymans |
2019-10-16 | sb/intel/bd82x6x/lpc: Set up default LPC decode ranges | Arthur Heymans |