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AgeCommit message (Expand)Author
2009-03-06* fix a minor power state issue in the ich7 smm handlerStefan Reinauer
2009-02-28coreboot-v2: drop this ugly historic union name in v2 that was dropped in v3Stefan Reinauer
2009-01-20forgot to svn addStefan Reinauer
2009-01-20Update Kontron boardStefan Reinauer
2009-01-19First shot at factoring SMM code into generic parts and southbridge specificStefan Reinauer
2008-11-06Drop #defines for registers that are not existant on the ICH7.Uwe Hermann
2008-11-06The enable_hpet() code in intel/i82801gx will not work with theUwe Hermann
2008-11-02Trim down the list of southbridges supported by the i82801xx driverUwe Hermann
2008-10-31Revert i945/ICH7 PCI IDs to be hard-coded numbers instead of #defines.Uwe Hermann
2008-10-29i945/ICH7: Use #defines from pci_ids.h (trivial).Uwe Hermann
2008-10-29Support for the Intel ICH7 southbridge.Stefan Reinauer
2008-09-03Tidy up identifiers, per Uwe's suggestion. Trivial.Ed Swierk
2008-08-25This patch adds PCI device IDs for the Intel EP80579 Integrated Processor,Ed Swierk
2008-08-25This patch modifies the Intel 3100 southbridge code to recognize theEd Swierk
2008-05-07Implement GPIO configuration routines for the Intel 3100 southbridge,Ed Swierk
2008-04-30By default, the Intel 3100 LPC interface enables only I/O range 0x3f8Ed Swierk
2008-04-06This patch halts the tco timer early in the boot process on all ICH series so...Joseph Smith
2008-04-01Setting an integrated southbridge device (like SATA or USB2.0) toEd Swierk
2008-04-01Remove i82801DB files that I meant to delete in r3206.Joseph Smith
2008-04-01Tiny style fix for consistency (trivial).Ed Swierk
2008-04-01Removal of i82801DB (ICH4)Joseph Smith
2008-04-01The early init code of several Intel southbridge chipsets callsEd Swierk
2008-03-30Like other Intel chipsets, the Intel 3100 has a TCO timer that rebootsEd Swierk
2008-03-16Here is an updated patch addressing most of Uwe's and Peter's ...Ed Swierk
2008-01-18Rename almost all occurences of LinuxBIOS to coreboot. Stefan Reinauer
2008-01-18Please bear with me - another rename checkin. This qualifies as trivial, noStefan Reinauer
2007-11-30Improve support for the Intel 82371FB/SB/AB/EB/MB southbridge(s):Uwe Hermann
2007-11-29Restructure/rename/comment a few 82371XX-related PCI IDs (trivial).Uwe Hermann
2007-11-07Add initial support for all known ICH* southbridges to theUwe Hermann
2007-11-07Add PCI IDs for most Intel southbridges of the 82801 seriesUwe Hermann
2007-11-04Restructure the PCI IDs list for the ICH* chipsets from ICH/ICH0 up toUwe Hermann
2007-10-30Various fixes and improvements of the 82801xx code.Joseph Smith
2007-10-24smaller changes to silence build warnings. (trivial)Stefan Reinauer
2007-10-24Ever wondered where those "setting incorrect section attributes forStefan Reinauer
2007-10-01Thee lines in i82801xx_pci.c need to be removed. They cause theJoseph Smith
2007-06-19Various minor cosmetics and coding style fixes (trivial).Uwe Hermann
2007-06-14Small bugfix in i82801xx_lpc.c.Corey Osgood
2007-06-14This patch adds support for the Intel i82810 northbridge and various i82801xxCorey Osgood
2007-06-03Intel 82371EB: Some code simplifications (trivial).Uwe Hermann
2007-05-29Intel 82371EB: Add IDE init support.Uwe Hermann
2007-05-27Init for the Intel 82371EB southbridge: make all ROM/BIOS regionsUwe Hermann
2007-05-03Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB,Uwe Hermann
2006-12-28A patch to add initial support for the i82801db southbridge basedJon Dufresne
2006-12-14In the file mainboard/intel/i82801dbm/i82801dbm.c the variableJon Dufresne
2006-12-14In src/southbridge/intel/i82801ca, first the smbus registers are mapped at i/ochn
2006-11-05Use the canonical name of the vendors/devices and theUwe Hermann
2006-08-23Uwe Hermann:Stefan Reinauer
2006-08-04final rename orgy. sorry for the inconvenience. This should fix it againStefan Reinauer
2006-08-04ouch. it's 8_2_371. I'll fix it. This commit breaks compilationStefan Reinauer
2006-08-04rename southbridge i440bx to its actual name i8371ebStefan Reinauer
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