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Some coreboot project code with my work
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southbridge
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pci1x2x
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pci1x2x.c
Age
Commit message (
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Author
2020-04-05
Drop explicit NULL initializations from `device_operations`
Elyes HAOUAS
2020-03-17
src (minus soc and mainboard): Remove copyright notices
Patrick Georgi
2019-10-30
src/southbridge: change "unsigned" to "unsigned int"
Martin Roth
2019-03-21
{northbridge, soc, southbridge}/intel: Make use of generic set_subsystem()
Subrata Banik
2019-03-04
arch/io.h: Drop unnecessary include
Kyösti Mälkki
2018-05-22
sb/ti/pci{1x2x,i7420,xx12}: Get rid of device_t
Elyes HAOUAS
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2011-04-20
pci1x2x: remove latency/bridge control/cacheline size settings
Sven Schnelle
2011-04-20
pci1x2x: use cardbus_read_resources()/cardbus_enable_resources()
Sven Schnelle
2011-04-20
pci1x2x: use pci_ops set_subsystem instead of custom code
Sven Schnelle
2011-04-20
pci1x2x: add PCI1510 device IDs
Sven Schnelle
2011-04-20
pci1x2x: use devicetree register configuration
Sven Schnelle
2010-12-26
Random fixes for TI pci1x2x / Nokia IP530 / others.
Uwe Hermann
2010-10-17
Add more missing GPL-headers, fix inconsistencies in others.
Uwe Hermann
2010-06-07
Fix some of Peter's suggestions for the Nokia IP530.
Myles Watson