coreboot - Some coreboot project code with my work

Age	Commit message (Collapse)	Author
2009-04-05	two more totalimpact briq fixes. Gets us back to the romfs breakage on PPC	Stefan Reinauer
	Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04	fix this warning for the embedded planet ep405pc	Stefan Reinauer
	/tmp/ccilLWBf.s: Assembler messages: /tmp/ccilLWBf.s:144: Warning: setting incorrect section attributes for .rodata.pci_driver Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4070 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-05	Updating FSF address in the code.	Stefan Reinauer
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-26	make sure enable_resource called on children	Greg Watson
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1800 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-24	scan the static bus	Greg Watson
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1791 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21	- Bump the LinuxBIOS major version	Eric Biederman
	- Rename chip_config chip_operations throughout the tree - Fix Config.lb on most of the Opteron Ports - Fix the amd 8000 chipset support for setting the subsystem vendor and device ids - Add detection of devices that are on the motherboard (i.e. In Config.lb) - Baby step in getting the resource limit handling correct, Ignore fixed resources - Only call enable_childrens_resources on devices we know will have children For some busses like i2c it is non-sense and we don't want it. - Set the resource limits for pnp devices resources. - Improve the resource size detection for pnp devices. - Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels - Added a header file to hold the prototype of isa_dma_init - Fixed most of the superio chips so the should work now, the via superio pci device is the exception. - The code compiles and runs so it is time for me to go to bed. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16	- First stab at running linuxbios without the old static device tree.	Eric Biederman
	Things are close but not quite there yet. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1681 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-26	cleanup code to remove warnings	Greg Watson
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1482 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-01-21	default values seem to work fine	Greg Watson
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1343 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-01-21	pass ide base address to driver	Greg Watson
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1342 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-12-17	* empty log message *	Greg Watson
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1320 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-12-17	use new pci config setup	Greg Watson
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1319 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28	moved extern to chip.h	Greg Watson
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1046 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23	new static configuration	Greg Watson
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1016 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-14	new config files	Greg Watson
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@962 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13	More FB2 stuff	Greg Watson
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@877 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13	Updated.	Greg Watson
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-09	Moved from freebios	Greg Watson
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@863 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1