| Age | Commit message (Expand) | Author |
|---|
| 2008-10-02 | This is so that people can see it. This is the sb600 for v3. It almost | Ronald G. Minnich |
| 2008-10-01 | The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots of | Carl-Daniel Hailfinger |
| 2008-09-22 | Patch for AMD SB600 chipset. | Michael Xie |
| 2008-09-22 | Patch for AMD RS690 chipset. | Michael Xie |
| 2008-09-19 | Attached patch fixes at least one issue ;) During the PCI BAR sizing must b... | Rudolf Marek |
| 2008-09-18 | ck804 whitespace fixes | Myles Watson |
| 2008-09-05 | This patch adds support for the VIA VT8237S south bridge. The VT8237R program... | Rudolf Marek |
| 2008-09-03 | Tidy up identifiers, per Uwe's suggestion. Trivial. | Ed Swierk |
| 2008-09-01 | This patch gets the Epia-CN working without ACPI or APIC. | Bari Ari |
| 2008-08-25 | This patch adds PCI device IDs for the Intel EP80579 Integrated Processor, | Ed Swierk |
| 2008-08-25 | This patch modifies the Intel 3100 southbridge code to recognize the | Ed Swierk |
| 2008-08-01 | coding style fixes (trivial) | Stefan Reinauer |
| 2008-07-12 | There was a programming error which made most USB port4 setup wrong. This pat... | Marc Jones |
| 2008-06-20 | Extend the VIA vt8237r southbridge decode range for the ROM to 1MB. | Bari Ari |
| 2008-05-07 | Implement GPIO configuration routines for the Intel 3100 southbridge, | Ed Swierk |
| 2008-05-06 | cs5536 IDE PWB flag was not getting set since it is 1<<14 and it was only doi... | Marc Jones |
| 2008-04-30 | By default, the Intel 3100 LPC interface enables only I/O range 0x3f8 | Ed Swierk |
| 2008-04-23 | This patch fixes the 3 broken sata ports on the Tyan s2891 (primary port on | Ward Vandewege |
| 2008-04-06 | This patch halts the tco timer early in the boot process on all ICH series so... | Joseph Smith |
| 2008-04-01 | Setting an integrated southbridge device (like SATA or USB2.0) to | Ed Swierk |
| 2008-04-01 | Remove i82801DB files that I meant to delete in r3206. | Joseph Smith |
| 2008-04-01 | Tiny style fix for consistency (trivial). | Ed Swierk |
| 2008-04-01 | Removal of i82801DB (ICH4) | Joseph Smith |
| 2008-04-01 | The early init code of several Intel southbridge chipsets calls | Ed Swierk |
| 2008-03-30 | Like other Intel chipsets, the Intel 3100 has a TCO timer that reboots | Ed Swierk |
| 2008-03-29 | Now coreboot performs IRQ routing for some boards. | Nikolay Petukhov |
| 2008-03-20 | Following patch adds K8M890 support. It initializes the AGP and graphics UMA. | Rudolf Marek |
| 2008-03-19 | Following patch will setup KT890 HT automatically. It will find the | Rudolf Marek |
| 2008-03-16 | Here is an updated patch addressing most of Uwe's and Peter's ... | Ed Swierk |
| 2008-03-15 | Following patch extends the ROM decoding to last 1MB, allowing to use larger | Rudolf Marek |
| 2008-03-15 | Following patch fixes the retrain/reset sequence which caused problem with some | Rudolf Marek |
| 2008-02-25 | This trivial patch removes an unused local variable, thus getting rid of | Ronald Hoogenboom |
| 2008-02-20 | Route device IRQ through PCI bridge instead in mptable. | Yinghai Lu |
| 2008-01-18 | Rename almost all occurences of LinuxBIOS to coreboot. | Stefan Reinauer |
| 2008-01-18 | Please bear with me - another rename checkin. This qualifies as trivial, no | Stefan Reinauer |
| 2007-12-19 | Additional early AMD8111 southbridge support for Barcelona platforms. | Marc Jones |
| 2007-11-30 | Improve support for the Intel 82371FB/SB/AB/EB/MB southbridge(s): | Uwe Hermann |
| 2007-11-29 | Restructure/rename/comment a few 82371XX-related PCI IDs (trivial). | Uwe Hermann |
| 2007-11-20 | 1. Fix pirq routing table setting for GA-2761GXDK. | Morgan Tsai |
| 2007-11-15 | Various cosmetic fixes and improvements (trivial). | Uwe Hermann |
| 2007-11-14 | * Maintaining SiS south bridge device IDs. | Morgan Tsai |
| 2007-11-13 | Add support for FID/VID changes messages. | Rudolf Marek |
| 2007-11-13 | Fine-tune the V-link bus between K8T890 and VT8237R and set | Rudolf Marek |
| 2007-11-07 | Add initial support for all known ICH* southbridges to the | Uwe Hermann |
| 2007-11-07 | This patch masks the function prototypes in stdlib.h from ROMCC, so that | Corey Osgood |
| 2007-11-07 | Add PCI IDs for most Intel southbridges of the 82801 series | Uwe Hermann |
| 2007-11-05 | * Change one PCI vendor ID from Nvidia to SiS | Carl-Daniel Hailfinger |
| 2007-11-04 | Various cosmetics, coding style fixes, constifications (trivial). | Uwe Hermann |
| 2007-11-04 | Restructure the PCI IDs list for the ICH* chipsets from ICH/ICH0 up to | Uwe Hermann |
| 2007-11-03 | This patch is some small changes to the vt8237r to prepare it for | Corey Osgood |
