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path: root/src/southbridge
AgeCommit message (Expand)Author
2019-11-20sb/broadcom/bcm5785: Drop supportArthur Heymans
2019-11-20sb/amd/sr5650: Drop supportArthur Heymans
2019-11-20sb/amd/sb800: Drop supportArthur Heymans
2019-11-20sb/amd/sb700: Drop supportArthur Heymans
2019-11-20sb/amd/rs780: Drop supportArthur Heymans
2019-11-20sb/amd/amd8132: Drop supportArthur Heymans
2019-11-20sb/amd/amd8111: Remove supportArthur Heymans
2019-11-20sb/via/common: Drop unused codeArthur Heymans
2019-11-20cpu/nb/sb: Remove fam12Joe Moore
2019-11-19sb/amd/hudson: Fix typo in GEC firmware nameMarshall Dawson
2019-11-18sb/intel/bd82x6x: Handle enabling of GbENico Huber
2019-11-18nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-18sb/intel/bd82x6x: Make the pch_enable_lpc hook optionalArthur Heymans
2019-11-18nb/intel/sandybridge: Make the mainboard_rcba_config hook optionalArthur Heymans
2019-11-18*/Makefile: Always build enable_usbdebug.cArthur Heymans
2019-11-18sb/intel/common: Properly guard USB debugArthur Heymans
2019-11-16sb/intel/i82801gx: Only include SPI code with SPI boot devicesArthur Heymans
2019-11-15nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-15nb/intel/i945: Initialize console in bootblockArthur Heymans
2019-11-15nb/intel/i945: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-14sb/intel/i82801gx: Don't setup CIR when the northbridge is x4xArthur Heymans
2019-11-14sb/intel/i82801jx: Move early sb init to a common placeArthur Heymans
2019-11-14sb/intel/i82801gx: Add common early codeArthur Heymans
2019-11-13sb/intel/i82801gx,ix,jx: Move HAVE_SMI_HANDLER conditionalKyösti Mälkki
2019-11-13sb/intel/i82801dx,ix: Replace SMM_ASEG conditionalKyösti Mälkki
2019-11-13sb/intel: Remove ENABLE_ACPI_MODE_IN_COREBOOTKyösti Mälkki
2019-11-13sb/intel/i82801jx: Enable upper 128bytes of CMOSArthur Heymans
2019-11-13sb/intel/i82801gx: Add a function to set up BARArthur Heymans
2019-11-13intel/82801dx,ix: Rename SMM_ASEG functionsKyösti Mälkki
2019-11-12sb/intel/i82801jx: Add common code for LPC decodeArthur Heymans
2019-11-12sb/intel/i82801gx: Add common LPC decode codeArthur Heymans
2019-11-10sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbolArthur Heymans
2019-11-10sb/intel/common: Make COMMON_RESET optionalArthur Heymans
2019-11-10sb/intel/common: Make linking rtc.c conditionalArthur Heymans
2019-11-09arch/x86: Replace some __SMM__ guardsKyösti Mälkki
2019-11-09ELOG: Avoid some preprocessor useKyösti Mälkki
2019-11-09ELOG: Introduce elog_gsmi variantsKyösti Mälkki
2019-11-08sb,soc/intel: Reduce preprocessor use with ME debuggingKyösti Mälkki
2019-11-08arch/x86: Drop some __SMM__ guardsKyösti Mälkki
2019-11-04sb/intel: Use defined CONFIG_HPET_ADDRESSElyes HAOUAS
2019-11-04sb/intel/lynxpoint: Use sb/intel/common/platform.aslArthur Heymans
2019-11-04mb/*/*{bd82x6x/ibexpreak}: Use sb/intel/common/acpi/platform.aslArthur Heymans
2019-11-04sb/intel/common/platform.asl: Remove setting unused GNVSArthur Heymans
2019-11-04sb/intel/i82801jx/nvs.h: include required headerArthur Heymans
2019-11-04sb/intel: Move 'smbus.asl' to common placeElyes HAOUAS
2019-11-01soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpiSubrata Banik
2019-10-30sb/intel/common: Make linking pmbase.c conditionalArthur Heymans
2019-10-30sb/intel/common/Makefile: Use 'all' class to link files in all stagesArthur Heymans
2019-10-30src/southbridge: change "unsigned" to "unsigned int"Martin Roth
2019-10-28nb/intel/gm45: Add C_ENVIRONMENT_BOOTBLOCK supportArthur Heymans