| Age | Commit message (Expand) | Author |
|---|
| 2008-12-23 | Fix implicit declarations of pci_read_config32 and pci_write_config32 in | Maggie Li |
| 2008-12-22 | Fix implicit udelay src/southbridge/nvidia/mcp55/mcp55_aza.c | Carl-Daniel Hailfinger |
| 2008-12-19 | Fix a LOT of implicit function declarations before they become errors. | Corey Osgood |
| 2008-12-18 | Fix implicit declaration in cn700/vt8237 code | Corey Osgood |
| 2008-12-18 | This patch gets rid of all the implicit definition warnings for serengeti exc... | Myles Watson |
| 2008-12-17 | Add 690G and 690(MT) internal graphics support. | Zheng Bao |
| 2008-12-13 | Move mainboard specific changes to the coreboot memory table into the | Stefan Reinauer |
| 2008-12-12 | Improve comments in early SB600 setup, handle non-LPC strapping and | Carl-Daniel Hailfinger |
| 2008-12-04 | The patch changes the LDTSTOP length as well mostly default content of 0xec, | Rudolf Marek |
| 2008-12-01 | Add AMD rs690 VID DID reporting and some minor cleanups. | Joe Bao |
| 2008-12-01 | Add AMD sb600 HPET setup and some minor cleanups. | Joe Bao |
| 2008-11-14 | drop dead code in sb600 hda | Stefan Reinauer |
| 2008-11-06 | Drop #defines for registers that are not existant on the ICH7. | Uwe Hermann |
| 2008-11-06 | The enable_hpet() code in intel/i82801gx will not work with the | Uwe Hermann |
| 2008-11-02 | Trim down the list of southbridges supported by the i82801xx driver | Uwe Hermann |
| 2008-10-31 | Revert i945/ICH7 PCI IDs to be hard-coded numbers instead of #defines. | Uwe Hermann |
| 2008-10-29 | i945/ICH7: Use #defines from pci_ids.h (trivial). | Uwe Hermann |
| 2008-10-29 | Support for the Intel ICH7 southbridge. | Stefan Reinauer |
| 2008-10-21 | I/O ports are 16bit, so change 'unsigned long port_base' to 'u16 port_base'. | Uwe Hermann |
| 2008-10-21 | Add missing license header. | Uwe Hermann |
| 2008-10-17 | Final fix for C7 boards, which are still using ROMCC, to be able to | Corey Osgood |
| 2008-10-17 | ROMCC chokes on vt8237_early_network_init(). Since that function is only | Carl-Daniel Hailfinger |
| 2008-10-16 | Revision 3567 introduced __attribute__((packed)) for a structured which | Carl-Daniel Hailfinger |
| 2008-10-13 | Move AMD RS690 and SB600 PCI IDs to pci_ids.h where they should be. | Uwe Hermann |
| 2008-10-12 | Remove an extra bracket left by the vt8237r cleanup patch (trivial) | Corey Osgood |
| 2008-10-12 | VIA VT8237R cleanups (trivial). | Uwe Hermann |
| 2008-10-09 | Added comment about sb600 wideio setting for clarity and a minor witespace c... | Marc Jones |
| 2008-10-07 | [PATCH] coreboot: Don't loop forever waiting for HDA codecs | Jordan Crouse |
| 2008-10-03 | Ron has been doing really good work over in v3. The problem is that the work ... | Marc Jones |
| 2008-10-02 | CK804 coding-style fixed based on an 'indent' run (trivial). | Uwe Hermann |
| 2008-10-02 | This is so that people can see it. This is the sb600 for v3. It almost | Ronald G. Minnich |
| 2008-10-01 | The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots of | Carl-Daniel Hailfinger |
| 2008-09-22 | Patch for AMD SB600 chipset. | Michael Xie |
| 2008-09-22 | Patch for AMD RS690 chipset. | Michael Xie |
| 2008-09-19 | Attached patch fixes at least one issue ;) During the PCI BAR sizing must b... | Rudolf Marek |
| 2008-09-18 | ck804 whitespace fixes | Myles Watson |
| 2008-09-05 | This patch adds support for the VIA VT8237S south bridge. The VT8237R program... | Rudolf Marek |
| 2008-09-03 | Tidy up identifiers, per Uwe's suggestion. Trivial. | Ed Swierk |
| 2008-09-01 | This patch gets the Epia-CN working without ACPI or APIC. | Bari Ari |
| 2008-08-25 | This patch adds PCI device IDs for the Intel EP80579 Integrated Processor, | Ed Swierk |
| 2008-08-25 | This patch modifies the Intel 3100 southbridge code to recognize the | Ed Swierk |
| 2008-08-01 | coding style fixes (trivial) | Stefan Reinauer |
| 2008-07-12 | There was a programming error which made most USB port4 setup wrong. This pat... | Marc Jones |
| 2008-06-20 | Extend the VIA vt8237r southbridge decode range for the ROM to 1MB. | Bari Ari |
| 2008-05-07 | Implement GPIO configuration routines for the Intel 3100 southbridge, | Ed Swierk |
| 2008-05-06 | cs5536 IDE PWB flag was not getting set since it is 1<<14 and it was only doi... | Marc Jones |
| 2008-04-30 | By default, the Intel 3100 LPC interface enables only I/O range 0x3f8 | Ed Swierk |
| 2008-04-23 | This patch fixes the 3 broken sata ports on the Tyan s2891 (primary port on | Ward Vandewege |
| 2008-04-06 | This patch halts the tco timer early in the boot process on all ICH series so... | Joseph Smith |
| 2008-04-01 | Setting an integrated southbridge device (like SATA or USB2.0) to | Ed Swierk |
