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coreboot
2560p
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broadwell_refcode
e6230
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haswell-mrc
hp820g1
hp9480m
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Some coreboot project code with my work
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southbridge
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Author
2007-09-14
More range for HT_CHAIN_UNITID_BASE and HT_CHAIN_END_UNITID_BASE.
Yinghai Lu
2007-09-14
This is a full rewrite of all the CS5530/CS5530A code. The previous code was
Uwe Hermann
2007-06-19
Various minor cosmetics and coding style fixes (trivial).
Uwe Hermann
2007-06-19
The GPIOs used for UART2 RX and TX were reversed.
Marc Jones
2007-06-14
Small bugfix in i82801xx_lpc.c.
Corey Osgood
2007-06-14
This patch adds support for the Intel i82810 northbridge and various i82801xx
Corey Osgood
2007-06-03
Intel 82371EB: Some code simplifications (trivial).
Uwe Hermann
2007-06-02
The UART disable code was causing a hang and was worked around with a
Marc Jones
2007-05-29
Intel 82371EB: Add IDE init support.
Uwe Hermann
2007-05-27
Init for the Intel 82371EB southbridge: make all ROM/BIOS regions
Uwe Hermann
2007-05-24
Drop the src/southbridge/amd/cs5536_lx directory and its contents, as
Uwe Hermann
2007-05-22
Add missing license headers, minor cosmetic fixes in existing headers.
Uwe Hermann
2007-05-10
This fix properly hides the UDC and OTG PCI headers when the cs5536 is
Marc Jones
2007-05-10
This patch cleans up and clarifies Geode source code comments.
Marc Jones
2007-05-10
This patch updates the PCI ID of the Geode IDE device to include the revision.
Marc Jones
2007-05-10
Fix the indent and whitespace to match LinuxBIOS standards
Jordan Crouse
2007-05-10
Add missing licenses to several of the files.
Jordan Crouse
2007-05-05
With this patch, the msm800sev runs FILO and boots a kernel.
Ronald G. Minnich
2007-05-04
patch to fix the IDE configuration on EPIA boards. At some point this
Ben Hewson
2007-05-04
This patch re-implements support for the CS5536 companion chip for the
Marc Jones
2007-05-03
Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB,
Uwe Hermann
2007-04-07
Fix epia-m build after u8/u16/u32 changes in Yh Lu's patch.
Peter Stuge
2007-03-17
Add initial pre-RAM serial output support for the VIA VT82C686(A/B)
Corey Osgood
2007-02-19
Fix some CHIP_NAME() entries to use canonical names.
Uwe Hermann
2007-02-03
Nvidia MCP55 uses CMD to send/receive bytes instead of DAT0,
bxshi
2007-02-02
I have Sun Ultra40 workstation. Southbridge is nVidia CrushK8-04/nforce
Roman Kononov
2007-02-01
This patch adds the MCP55 PCI IDs (without which the southbridge code
Ed Swierk
2007-02-01
Add support for the NVIDIA MCP55 southbridge.
Yinghai Lu
2006-12-28
A patch to add initial support for the i82801db southbridge based
Jon Dufresne
2006-12-20
ck804 pref mem 4G above support
Yinghai Lu
2006-12-14
In the file mainboard/intel/i82801dbm/i82801dbm.c the variable
Jon Dufresne
2006-12-14
In src/southbridge/intel/i82801ca, first the smbus registers are mapped at i/o
chn
2006-11-05
Use the canonical name of the vendors/devices and the
Uwe Hermann
2006-11-02
Sorry, this is the last commit I will do this way, but MSI has waited a
bxshi
2006-10-13
s2895 failover build
Yinghai Lu
2006-10-13
return missed
Yinghai Lu
2006-10-04
CONFIG_USE_PRINTK_IN_CAR and ht chain id for HTX support in
Yinghai Lu
2006-10-04
AMD Rev F support
Yinghai Lu
2006-09-20
Lots of lx fixes. CLeanup mainly. THings now build
Ronald G. Minnich
2006-09-19
put this in the right place.
Ronald G. Minnich
2006-09-18
add the _lx flavor of the 5536. This will later be merged into the
Ronald G. Minnich
2006-09-13
add file for dcon support
Jordan Crouse
2006-09-13
fix cardbus interrups (signed off by Nick Barker)
Stefan Reinauer
2006-08-28
- Much better USB P4 fix.
Richard Smith
2006-08-25
- USB P4 as host fix
Richard Smith
2006-08-25
- fix a silly pointer dereference thinko in my previous commit
Richard Smith
2006-08-25
- Added suport for enabling USB P4 on the olpc
Richard Smith
2006-08-23
Uwe Hermann:
Stefan Reinauer
2006-08-15
this file is already included by auto.c on all targets.
Stefan Reinauer
2006-08-04
final rename orgy. sorry for the inconvenience. This should fix it again
Stefan Reinauer
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