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path: root/src/southbridge
AgeCommit message (Expand)Author
2012-07-16Define global uma_memory variablesKyösti Mälkki
2012-07-14AGESA F15 wrapper for Hudson.zbao
2012-07-03Fix AMD S3 block generator on CygwinPatrick Georgi
2012-07-03AGESA F15 wrapper for Trinityzbao
2012-06-23i3100: add smbus_write_byte()Sven Schnelle
2012-06-21i3100: Enable second IOAPIC for PCI-XSven Schnelle
2012-06-21Don't use 64-bit constant 0x100000000 in linker scriptsNico Huber
2012-06-12Update SB800 CIMX FADTMartin Roth
2012-05-30Provide functions to access arbitrary GPIO pins and vectorsVadim Bendebury
2012-05-30Add support for Panther Point to SPI driverStefan Reinauer
2012-05-29Fix compilation with CONFIG_DEBUG_SPI_FLASH enabledStefan Reinauer
2012-05-29Fix full reset for Ivy Bridge platformsVadim Bendebury
2012-05-24cbtypes.h: Unify cbtypes.h used in AMD board's codeVikram Narayanan
2012-05-15Fix fadt legacy free setting.Marc Jones
2012-05-12Add legacy free setting and override to fadt.cMarc Jones
2012-05-12Merge sb800 fadt fixes from South Station mainboard to southbridge fadt.Marc Jones
2012-05-10Add SPI flash driverStefan Reinauer
2012-05-10Unmark source files as executablesAlec Ari
2012-05-09Move fadt.c to the cimx sb800 southbridge directory to be shared.Marc Jones
2012-05-09Add simple PMIO & PMIO2 read/write routines to CIMX wrapperMartin Roth
2012-05-08Some more #if cleanupPatrick Georgi
2012-05-08Clean up #ifsPatrick Georgi
2012-05-01Fix issue with PCIe power management setupDuncan Laurie
2012-05-01Add an option to enable PCIe root port coalescingDuncan Laurie
2012-05-01Update PCIe Root Port _PRT to handle re-mapped functionsDuncan Laurie
2012-05-01Fix SATA port map to only enable port 0Stefan Reinauer
2012-05-01Don't disable ACPI in the S3 resume pathDuncan Laurie
2012-05-01add new LPC controller device ID valueVadim Bendebury
2012-05-01Allow device ID arrays in the PCI driver structureVadim Bendebury
2012-04-27Cougar Point southbridge: Add includes and drop post_code()Stefan Reinauer
2012-04-27SMM: unify mainboard APM command handlersStefan Reinauer
2012-04-24Intel 82801dx: compile early_smbus as separate objectKyösti Mälkki
2012-04-20Refactor some alignment handlingPatrick Georgi
2012-04-19Do not produce temp s3.rom if the board doesn't need it.zbao
2012-04-17More portable s3 scratch space creationPatrick Georgi
2012-04-12Add Southbridge support for S3.zbao
2012-04-12Unify IO APIC address specificationPatrick Georgi
2012-04-04Add support for Intel Panther Point PCHStefan Reinauer
2012-04-02Add sb800 spi support.zbao
2012-03-27Add support for RDC R8610 SouthbridgeRudolf Marek
2012-03-24i82801gx: Support power-on-after-power-fail betterPatrick Georgi
2012-03-24i82801gx: Use CMOS variable if available for power-on on power failurePatrick Georgi
2012-03-16VIA southbridge K8T890: Apply un-written naming rulesKyösti Mälkki
2012-03-07Move C labels to start-of-linePatrick Georgi
2012-02-29AMD southbridge: remove sp5100Kyösti Mälkki
2012-02-22amd/sb600: Move HAVE_HARD_RESET to southbridgePatrick Georgi
2012-02-20Force SB600 bootblock to use I/O for PCI configDave Frodin
2012-02-20Force SB700 bootblock code to use I/O for PCI config cycles.Dave Frodin
2012-02-20Force SB800 bootblock to use I/O for PCI configDave Frodin
2012-02-20Fixes Fam10/SR5650 cpu not recognized message.Dave Frodin