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path: root/src/southbridge
AgeCommit message (Expand)Author
2009-01-19First shot at factoring SMM code into generic parts and southbridge specificStefan Reinauer
2009-01-15Adds a retry/faildown to SB600 SATA detection logic.Dan Lykowski
2008-12-29The SB600 RPR documentation does not mention what to do if SATA_BAR0+6Carl-Daniel Hailfinger
2008-12-23Handle RS690 quirks for 1 GHz noncoherent HyperTransport.Carl-Daniel Hailfinger
2008-12-23Fix implicit declarations of pci_read_config32 and pci_write_config32 inMaggie Li
2008-12-22Fix implicit udelay src/southbridge/nvidia/mcp55/mcp55_aza.cCarl-Daniel Hailfinger
2008-12-19Fix a LOT of implicit function declarations before they become errors.Corey Osgood
2008-12-18Fix implicit declaration in cn700/vt8237 codeCorey Osgood
2008-12-18This patch gets rid of all the implicit definition warnings for serengeti exc...Myles Watson
2008-12-17Add 690G and 690(MT) internal graphics support.Zheng Bao
2008-12-13Move mainboard specific changes to the coreboot memory table into theStefan Reinauer
2008-12-12Improve comments in early SB600 setup, handle non-LPC strapping andCarl-Daniel Hailfinger
2008-12-04The patch changes the LDTSTOP length as well mostly default content of 0xec,Rudolf Marek
2008-12-01Add AMD rs690 VID DID reporting and some minor cleanups.Joe Bao
2008-12-01Add AMD sb600 HPET setup and some minor cleanups.Joe Bao
2008-11-14drop dead code in sb600 hdaStefan Reinauer
2008-11-06Drop #defines for registers that are not existant on the ICH7.Uwe Hermann
2008-11-06The enable_hpet() code in intel/i82801gx will not work with theUwe Hermann
2008-11-02Trim down the list of southbridges supported by the i82801xx driverUwe Hermann
2008-10-31Revert i945/ICH7 PCI IDs to be hard-coded numbers instead of #defines.Uwe Hermann
2008-10-29i945/ICH7: Use #defines from pci_ids.h (trivial).Uwe Hermann
2008-10-29Support for the Intel ICH7 southbridge.Stefan Reinauer
2008-10-21I/O ports are 16bit, so change 'unsigned long port_base' to 'u16 port_base'.Uwe Hermann
2008-10-21Add missing license header.Uwe Hermann
2008-10-17Final fix for C7 boards, which are still using ROMCC, to be able toCorey Osgood
2008-10-17ROMCC chokes on vt8237_early_network_init(). Since that function is onlyCarl-Daniel Hailfinger
2008-10-16Revision 3567 introduced __attribute__((packed)) for a structured whichCarl-Daniel Hailfinger
2008-10-13Move AMD RS690 and SB600 PCI IDs to pci_ids.h where they should be.Uwe Hermann
2008-10-12Remove an extra bracket left by the vt8237r cleanup patch (trivial)Corey Osgood
2008-10-12VIA VT8237R cleanups (trivial).Uwe Hermann
2008-10-09Added comment about sb600 wideio setting for clarity and a minor witespace c...Marc Jones
2008-10-07[PATCH] coreboot: Don't loop forever waiting for HDA codecsJordan Crouse
2008-10-03Ron has been doing really good work over in v3. The problem is that the work ...Marc Jones
2008-10-02CK804 coding-style fixed based on an 'indent' run (trivial).Uwe Hermann
2008-10-02This is so that people can see it. This is the sb600 for v3. It almost Ronald G. Minnich
2008-10-01The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots ofCarl-Daniel Hailfinger
2008-09-22Patch for AMD SB600 chipset.Michael Xie
2008-09-22Patch for AMD RS690 chipset.Michael Xie
2008-09-19Attached patch fixes at least one issue ;) During the PCI BAR sizing must b...Rudolf Marek
2008-09-18ck804 whitespace fixesMyles Watson
2008-09-05This patch adds support for the VIA VT8237S south bridge. The VT8237R program...Rudolf Marek
2008-09-03Tidy up identifiers, per Uwe's suggestion. Trivial.Ed Swierk
2008-09-01This patch gets the Epia-CN working without ACPI or APIC.Bari Ari
2008-08-25This patch adds PCI device IDs for the Intel EP80579 Integrated Processor,Ed Swierk
2008-08-25This patch modifies the Intel 3100 southbridge code to recognize theEd Swierk
2008-08-01coding style fixes (trivial)Stefan Reinauer
2008-07-12There was a programming error which made most USB port4 setup wrong. This pat...Marc Jones
2008-06-20Extend the VIA vt8237r southbridge decode range for the ROM to 1MB.Bari Ari
2008-05-07Implement GPIO configuration routines for the Intel 3100 southbridge,Ed Swierk
2008-05-06cs5536 IDE PWB flag was not getting set since it is 1<<14 and it was only doi...Marc Jones
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