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2016-05-29sio/winbond/w83667hg-a: Add pinmux defines for UART BTimothy Pearson
Change-Id: Ib98c69de781d2b651ec168d03250cacc918c5c1f Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com> Reviewed-on: https://review.coreboot.org/14965 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2016-05-29sio/winbond/common: Add function to configure pin muxTimothy Pearson
Certain mainboards require SuperIO pinmux configuration before peripherals will become operational. Allow each mainboard to configure the pinmux(es) of Winbond chips if needed. Change-Id: Ice19f8d8514b66b15920a5b893700d636ed75cec Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com> Reviewed-on: https://review.coreboot.org/14960 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2016-05-20sio/winbond: Expose enter/exit configuration state functionsTimothy Pearson
Certain mainboards, e.g. the ASUS KGPE-D16/KCMA-D8, require board-specific configuration changes to the SuperIO. Expose the functions needed to enter and exit configuration mode on Winbond devices. Change-Id: Ic86651872ecafcfe1398201be2b0768bbe460975 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/14891 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-04-13superio/smsc/mec1308: Fix AddressMax value for SMBX mailboxMartin Roth
The way this was implemented before was causing ACPI failures. There was also a basic misunderstanding of what the AddressMax field was used for. In this case, because it's a fixed address, it should be the same as the AddressMin field. Getting rid of the addition in the field solves the ACPI output problem. Change-Id: Idec2bf0ed27ae694e98f141087cdf22401937178 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/14343 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: Duncan Laurie <dlaurie@google.com>
2016-04-08superio/winbond/w83667hg-a: Set SPI device mask correctlyTimothy Pearson
This resolves error messages of the form: ERROR: device PNP: 002e.6 index 98 has no mask. Change-Id: I6a368b902d051c8da6f74cbde54f5d12a3e52c2f Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/14272 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2016-04-02superio/nuvoton: Use official spelling of Nuvoton in `CHIP_NAME`Paul Menzel
The official spelling of Nuvoton is not all uppercase. Only the first letter is uppercase. See the footer of the Nuvoton Web site. Change-Id: I6ccd4194d7be0c89f8b332fcca5feb2420a4de1e Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/5928 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-03-08roda/rk9: Remove #include early_serial.c from romstageAntonello Dettori
Remove dependency on early_serial.c and instead use the Super I/O's header to access the functions needed. Also re-organize some of the superio code in order to succesfully compile the rom. Change-Id: I85a6f1352ae3b91c3c98e4d3fa0b90b87e02babc Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/13925 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-05amd/thatcher: Removed #include early_serial.c from romstageAntonello Dettori
Remove dependency on early_serial.c and instead use the Super I/O's header to access the functions needed. Change-Id: I9edf7fc2501aa832106dda9213e702dbcc1200b4 Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/13887 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins)
2016-02-09superio/nuvoton/nct5572d: Add PS/2 presence detectPaul Menzel
On certain Super I/O devices, when a PS/2 mouse is not present on the auxiliary channel both channels will cease to function if the auxiliary channel is probed while the primary channel is active. Therefore, knowledge of mouse presence must be gathered by coreboot during early boot, and used to enable or disable the auxiliary PS/2 port before control is passed to the operating system. This is added in commit 448e3863 (drivers/pc80: Add PS/2 mouse presence detect). Update the Nuvoton NCT5572D driver to flag the auxiliary channel as disabled if no device was detected. The code is copied from the Winbond W83667HG-A driver. Note, the ACPI changes are not part of this commit. TEST=Currently, on the ASRock E350M1, PS/2 does not work. With this change, a PS/2 keyboard works fine in SeaBIOS, GRUB in MBR, and Debian GNU/Linux Sid/unstable with Linux 3.19. ``` [ 1.185195] i8042: PNP: No PS/2 controller found. Probing ports directly. [ 1.189110] serio: i8042 KBD port at 0x60,0x64 irq 1 [ 1.189133] serio: i8042 AUX port at 0x60,0x64 irq 12 [ 1.189970] mousedev: PS/2 mouse device common for all mice ``` Change-Id: I7f9be348d295e70437bef089d4c2173169f38459 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/13618 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-01drivers/pc80: Add PS/2 mouse presence detectTimothy Pearson
On certain Winbond SuperIO devices, when a PS/2 mouse is not present on the auxiliary channel both channels will cease to function if the auxiliary channel is probed while the primary channel is active. Therefore, knowledge of mouse presence must be gathered by coreboot during early boot, and used to enable or disable the auxiliary PS/2 port before control is passed to the operating system. Add auxiliary channel PS/2 device presence detect, and update the Winbond W83667HG-A driver to flag the auxiliary channel as disabled if no device was detected. Change-Id: I76274493dacc9016ac6d0dff8548d1dc931c6266 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/13165 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-29superio/winbond/w83667hg-a: Add support for W83667HG-ATimothy Pearson
The KGPE-D16 and KCMA-D8 use a Winbond W83667HG-A SuperIO. While the Nuvoton NCT5572D is effectively the same core, and a close enough match to get things working initially, the W83667HG-A has a different LDN mapping and several extra features that require a separate support driver. Clone the Nuvoton NCT5572D and modify according to the W83667HG-A datasheet, version 1.4. Change-Id: I707ba2e40a22d41cd813003d84a82cb20304f55b Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/13156 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2016-01-18header files: Fix guard name comments to match guard namesMartin Roth
This just updates existing guard name comments on the header files to match the actual #define name. As a side effect, if there was no newline at the end of these files, one was added. Change-Id: Ia2cd8057f2b1ceb0fa1b946e85e0c16a327a04d7 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/12900 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-01-13tree: drop last paragraph of GPL copyright header from new filesMartin Roth
This continues what was done in commit a73b93157f2 (tree: drop last paragraph of GPL copyright header) Change-Id: Ifb8d2d13f7787657445817bdde8dc15df375e173 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/12914 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-01-07Correct some common spelling mistakesMartin Roth
- occured -> occurred - accomodate -> accommodate - existant -> existent - asssertion -> assertion - manangement -> management - cotroller -> controller Change-Id: Ibd6663752466d691fabbdc216ea05f2b58ac12d1 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/12850 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-31superio/it8772f: Add register to set the default value of FAN speedTed Kuo
Original-Signed-off-by: Ted Kuo <tedkuo@ami.com.tw> Change-Id: I70d7b572e9ae030136a39fb6fa933f486d559aef Original-Reviewed-on: https://chromium-review.googlesource.com/262832 Original-Reviewed-by: Shawn N <shawnn@chromium.org> Original-Commit-Queue: Ted Kuo <tedkuo@ami.com.tw> Original-Tested-by: Ted Kuo <tedkuo@ami.com.tw> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/12799 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-12-31superio/it8772f: Add switch to enable HWM (Hardware Monitor)Ted Kuo
Set up External Temperature to read via thermal diode/resistor into TMPINx register by setting thermal_mode switch. Original-Signed-off-by: Ted Kuo <tedkuo@ami.com.tw> Change-Id: I0e8621b92faa5c6246e009d2f852c8d4db484034 Original-Reviewed-on: https://chromium-review.googlesource.com/260545 Original-Reviewed-by: Shawn N <shawnn@chromium.org> Original-Tested-by: Ted Kuo <tedkuo@ami.com.tw> Original-(cherry picked from commit 973e2d393f2595b756f8aa20f6fbe3b6e045621a) Original-Reviewed-on: https://chromium-review.googlesource.com/262340 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/12798 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-12-30superio/it8718f: Add missing PNP infoDamien Zammit
Change-Id: Id6d50d4d6af31e43f851645f09383121755291f6 Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/12815 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-12-29device/pnp: Ability to set vendor specific logical device configDamien Zammit
According to the PNP ISA v1.0a spec, config registers in the range of 0xf0 up to 0xfe are vendor defined and may be used for any purpose. Config register 0xff is reserved and is defined as such. Currently, only vendor specific registers 0xf0, 0xf1, 0xf4, and 0xfa are able to be set using the PNP_MSCx bit flag masks. This patch adds support for all 15 vendor specific config registers, and updates the existing superio pnp_info to use them where appropriate. Change-Id: Id43b85f74e3192b17dbd7e54c4c6136a2e59ad55 Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/12808 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-12-26IT8772F: Clean up it8772f includes and add a LED APIdavid
- Remove it8772f c includes - Add a new LED API, it8772f_gpio_led - Stumpy: using it8772f_gpio_led BUG=chrome-os-partner:28232 BRANCH=Guado TEST=emerge-guado coreboot chromeos-bootimage Change-Id: I08de52515d3c1e7e85d1761c09a0cebffda7dda3 Signed-off-by: David Wu <David_Wu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/241813 Tested-by: David Wu <david_wu@quantatw.com> Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: David Wu <david_wu@quantatw.com> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/12797 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-11-24superio/smsc/mec1308: Fix IASL warningsMartin Roth
The SIO device needs to provide an _ADR object with the IO address as well as the address in the OperationRegion. ACPI provides two different Resource Descriptor Macros to describe the I/O areas required for a device. The FixedIO macro is only valid for 10-bit IO addresses. Use the IO macro instead. Thank you to recent IASL that allows for addition in the ASL file. :) Fixes these warnings: dsdt.aml 2276: Device (SIO) { Warning 3141 - ^ Missing dependency (Device object requires a _HID or _ADR in same scope) dsdt.aml 2390: FixedIO (0xa00, 0x34) Warning 3060 - ^ Maximum 10-bit ISA address (0x3FF) dsdt.aml 2394: FixedIO (0xa00, 0x34) Warning 3060 - ^ Maximum 10-bit ISA address (0x3FF) Lumpy now compiles its ASL tables with no warnings. Re-enable Warnings as errors. Change-Id: Id26e234eadaa3b966e8f769cb9f9fb7ea64fc9e3 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/12520 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-16Revert "Drop SuperIO nuvoton/nct6779d"Stefan Reinauer
This reverts commit 42444f6f53d47604d9a44c9e109b5717efaed74f. Change-Id: Ifaaaad715d94c3c9ff365745aa2e6ee546924f4f Reviewed-on: http://review.coreboot.org/12328 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-10Drop SuperIO fintek/f71889Stefan Reinauer
All boards using this SuperIO have been removed from the tree already. Change-Id: I3c43a431d92d76b6ed3ec72b203d3e80925cadea Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/12247 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-11-10superio/intel: Add i8900 deviceMarc Jones
The Intel i8900 Super I/O is similar to the previously supported i3100. Change-Id: I9a5b651cab35991c3c3e09fc4668d35ca2d221ba Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/12169 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: York Yang <york.yang@intel.com>
2015-11-09superio/windbond: Add WPCD376I deviceMarc Jones
The Winbond WPCD376I is a desktop Super I/O often selected on Intel mainboards. The support is similar to other Winbond and NSC SIOs. Based on output from superiotool -d. Change-Id: Ib4786b410b1d83606e8d79a9f686c14a5d25cadf Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/12165 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-11-04Drop SuperIO smsc/fdc37m60xStefan Reinauer
All boards using this SuperIO have been removed from the tree already. Change-Id: I52847bc2fc16b27ac0de0bc7c847221b1e5cb744 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/12245 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-11-02superio/nuvoton/nct5572d: Add missing logical devicesKyösti Mälkki
While the actual pins behind these devices are not exposed on the chip, the enable registers are implemented in hardware. Allow to turn these LDNs off, like the vendor bios for asrock/e350m1 does. Change-Id: I4d6d5a8de12b09095138cacbad62b2dfbbe54028 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/12213 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-30Drop SuperIO nuvoton/nct6779dStefan Reinauer
All boards using this SuperIO have been removed from the tree already. Change-Id: I57eacf2a88077d0d0bffdcf44b3c2ecbd301e625 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/12242 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-30Drop SuperIO ite/it8661fStefan Reinauer
All boards using this SuperIO have been removed from the tree already. Change-Id: Ifca91ae44ab222371808ff1e0027a7cbd4646b0a Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/12243 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-30Drop SuperIO nuvoton/nct6776Stefan Reinauer
All boards using this SuperIO have been removed from the tree already. Change-Id: Ic5604c75de249b945dca58aa904edec86558d3ec Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/12241 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-30Drop SuperIO nsc/pc97307Stefan Reinauer
All boards using this SuperIO have been removed already. Change-Id: I667a8d15a2d16671115f62de656b1c5c6a8259b9 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/12240 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-30Drop SuperIO nsc/pc8374Stefan Reinauer
All boards using this SuperIO have been removed from the tree. Change-Id: I1d13ec7c5f27e82523612af7f07fca3176953600 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/12239 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-23superio/nuvoton/nct5572d: Enable power state after power failure supportTimothy Pearson
Change-Id: Ia0313b9ecd64c9e6f99a140772ebb35abe0175fd Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/11950 Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-07-13superio/smsc: Add support for SMSC DME1737Jonathan A. Kollasch
Change-Id: If2ba9ca48c809fe4f7dc0595a3cb3df168d630fd Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/10893 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-13superio/smsc/dme1737: copy superio/smsc/lpc47b397Jonathan A. Kollasch
Change-Id: I3218bfaaa64bcad54fe97c6f887025356ccc9356 Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/10892 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-22superio: use common x86 code on x86-64Stefan Reinauer
Change-Id: I2ddb5a8b183b21cbd3c3b22c537b815e86bd4738 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/10592 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-06-21superio/fintek/Kconfig: add newline at end of file.Martin Roth
Kconfig sometimes fails to parse the last line of a file if there's no newline at the end. Add one to be safe. Change-Id: Ia9973a89b12596e1f2a2741ad2e255e886495331 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/10614 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-12superio/fintek: Add support for Fintek F81866AD-IFabian Kunkel
This patch adds support for the Fintek F81866AD-I SuperIO, which is very similar to the fintek/f81865f. This code adds some fan control support, inspired by fintek/f71869ad. Furthermore its possible to change the temp sensor type (thermistor or diode). Datasheet: Name: F81866D/A-I, Release Date: Jan 2012, Version: V0.12P Link: http://www.alldatasheet.com/datasheet-pdf/pdf/459085/FINTEK/F81866AD-I.html Change-Id: Id2fc1119b37142f8101f71908e394ee69c45041d Signed-off-by: Fabian Kunkel <fabi@adv.bruhnspace.com> Reviewed-on: http://review.coreboot.org/10287 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-06-04devicetree: Discriminate device ops scan_bus()Kyösti Mälkki
Use of scan_static_bus() and tree traversals is somewhat convoluted. Start cleaning this up by assigning each path type with separate static scan_bus() function. For ME, SMBus and LPC paths a bus cannot expose bridges, as those would add to the number of encountered PCI buses. Change-Id: I8bb11450516faad4fa33b8f69bce5b9978ec75e5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8534 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2015-05-21Remove address from GPLv2 headersPatrick Georgi
As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2015-05-19superio/nuvoton: Add support for Nuvoton NCT6779DMatt DeVillier
Add support for Nuvoton NCT6779D, using NCT6776 as a baseline Change-Id: I020a21267f7e30bdea4bb5f83d67bd94082fdf05 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: http://review.coreboot.org/10232 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2015-05-17nuvoton/nct6776: there is no IRQ for LDN8Felix Held
Change-Id: Ib4ee3633d210a05e06ed95fc13830cc692095501 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/10235 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-05-14superio: Replace the indexed I/O functionsDave Frodin
Replace the multiple indexed I/O read and write functions with common functions. Change-Id: Idfe7a8784c28d51b3fbcb2f4e26beaa0b91741a8 Signed-off-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-on: http://review.coreboot.org/10145 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2015-05-14superio/nct5104d: Handle shared GPIO/UART pinsKyösti Mälkki
Routing is decided based on enabled logical/virtual devices. For a valid devicetree, one should have only one of SP3 and GPIO0, and only one of SP4 and GPIO1, enabled at a time in configuration. Change-Id: I02017786aba9dd22d12403aaa71d7641f5bbf997 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10177 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
2015-05-14superio/nct5104d: Refactor IRQ trigger configKyösti Mälkki
That function was getting too long. Change-Id: Ic50f210391c2467b65215aa556269b0ba601c2ec Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10176 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
2015-04-07kconfig: drop intermittend forwarder filesStefan Reinauer
With kconfig understanding wildcards, we don't need Kconfig files that just include other Kconfig files anymore. Change-Id: I7584e675f78fcb4ff1fdb0731e340533c5bc040d Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/9298 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-03-21superio: ite8772f: Exit extemp busy stateRyan Lin
It causes fan top speed due to this bug + our board-specific workaround, and causes invalid temperature sensor readings. Therefore, re-configure the register "External Temperature Sensor Host Control Register" to terminate processes when this issue happens. BUG=chromium:402204 TEST=ran suspend_stress_test 500 times Change-Id: I439d5de798fbe999e4eec5497e6969b7b453121b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: b82f2922c7fce3ca6b2797a8d9775e9db2817fe9 Original-Change-Id: I6e71b6a46a31b00e541c304f1ed58c1678c1d42e Original-Signed-off-by: Ryan Lin <ryan.lin@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/219445 Original-Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: http://review.coreboot.org/8820 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-02-14superio/fintek/f81216h: Add the correct unlock key valuesDave Frodin
The actual key values were not added in commit 17ace8255. TEST: amd/lamar shows the correct result. Change-Id: I8f20e3d0ce83dd87b6c233ee98c3e77a6b7c1b03 Signed-off-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-on: http://review.coreboot.org/8375 Reviewed-by: Marc Jones <marc.jones@se-eng.com> Tested-by: Marc Jones <marc.jones@se-eng.com>
2015-02-04superio/fintek: Add required changes so F81216H can be usedDave Frodin
The amd/lamar mainboard is the first mainboard to use the f81216h. These changes are needed to fix up commit 27a63d77 so the Super I/O builds and functions correctly. - Wrong #include name - Removed global variable in romstage - Missing "case" in switch() Change-Id: I1b2058a915b776664fba14e4341e8a410b50330f Signed-off-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-on: http://review.coreboot.org/8255 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-01-06superio: Drop print_ implementation from non-romcc boardsStefan Reinauer
Because we had no stack on romcc boards, we had a separate, not as powerful clone of printk: print_*. Back in the day, like more than half a decade ago, we migrated a lot of boards to printk, but we never cleaned up the existing code to be consistent. instead, we worked around the problem with a very messy console.h (nowadays the mess is hidden in romstage_console.c and early_print.h) This patch cleans up the superio code to use printk() on all non-ROMCC boards. Change-Id: I23fc307f1346cdb7adaaeccfafe17d9205e909ac Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/8113 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-02 04:31:09 +0000