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Some coreboot project code with my work
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gcccar.inc
Age
Commit message (
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Author
2019-01-17
vendorcode/{amd,cavium,intel}: Remove trailing whitespace
Peter Lemenkov
2017-09-26
AGESA: Drop CAR teardown without POSTCAR_STAGE
Kyösti Mälkki
2017-09-26
AGESA: Implement POSTCAR_STAGE
Kyösti Mälkki
2017-08-16
AGESA f14: Sacrifice ACPI S3 support for EARLY_CBMEM_INIT
Kyösti Mälkki
2017-07-15
vendorcode/amd/agesa: Tidy up gcccar.inc
Kyösti Mälkki
2017-07-15
vendorcode/amd/agesa: Sync irrelevant differences
Kyösti Mälkki
2016-01-07
src/vendorcode/amd: correct spelling of MTRR
Paul Menzel
2015-08-09
f10/f12: Remove whitespace from gcccar.inc
Stefan Reinauer
2015-07-07
x86: Drop -Wa,--divide
Stefan Reinauer
2014-11-19
vendorcode/amd/agesa/f15tn: Fix assembly bugs
Damien Zammit
2014-03-02
vendorcode/amd/agesa/f*: Improve gcccar.inc assembler compatibility.
Edward O'Callaghan
2013-12-07
Correct file permissions.
Idwer Vollering
2013-03-08
AGESA: Fix CR0_PE bit define
Konstantin Aladyshev
2013-03-08
AGESA: Fix bug in AMD_DISABLE_STACK_FAMILY_HOOK_F15
Konstantin Aladyshev
2011-06-21
Add AMD Family 12 cpu Agesa code
efdesign98