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coreboot
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broadwell_refcode
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haswell-mrc
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Some coreboot project code with my work
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vendorcode
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amd
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cimx
Age
Commit message (
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Author
2011-12-02
Change AMD vendorcode build
Kyösti Mälkki
2011-10-14
Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6
Stefan Reinauer
2011-10-11
sb800: sata combine mode configure fix
Kerry Sheh
2011-09-07
AMD SB800 southbridge update
Kerry She
2011-09-07
AMD F14 southbridge update
Kerry She
2011-06-22
Rename {CPU|NB|SB}/amd/*_wrapper folders
efdesign98
2011-06-21
Add AMD SB900 CIMx code
efdesign98
2011-06-01
trivial remove blanks at the end of line
Kerry She
2011-06-01
This patch fix a AMD sb800 wrapper compile warning:
Kerry She
2011-05-15
Remove multiple mmconf settings and just use kconfig setting.
Marc Jones
2011-05-15
Move mmconf base from e0000000 to f8000000 to avoid conflict with UMA BAR.
Scott Duplichan
2011-05-15
Fix ACPI shutdown function by removing reliance on SMI.
Scott Duplichan
2011-05-07
SB800 CIMX code can share the AGESA V5 lib code,
Kerry She
2011-02-14
Add AMD Agesa and AMD CIMx SB800 code. Patch 1 of 8.
Frank Vibrans
2011-01-18
remove the code which is not ready to release.
Zheng Bao
2011-01-11
change a readable way to fix SB800 CIMX "multi-character constant warning".
Kerry She
2011-01-04
Trivial:
Kerry She
2011-01-01
Add AMD SB800 southbridge CIMx code.
Kerry She