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AgeCommit message (Expand)Author
2018-07-10cavium: Add CN81xx SoC and eval board supportDavid Hendricks
2018-07-03soc/cavium: Integrate BDK files into corebootDavid Hendricks
2018-06-13vc/amd/00670F00: Sync AGESA.h with PI blobMarshall Dawson
2018-06-04security/tpm: Unify the coreboot TPM software stackPhilipp Deppenwiese
2018-05-24Remove leftover AMD CIMX RD890 vendorcodeKyösti Mälkki
2018-05-22vendorcode/intel: Update GLK FSP Header files w.r.t FSP v2.0.3Srinidhi N Kaushik
2018-05-22stonyridge: Add TP_Perf_STRUCT structRaul E Rangel
2018-05-18intel/fsp: Update Cannonlake FSP headerLijian Zhao
2018-05-10AGESA f14: Remove OPTION_DDR2Kyösti Mälkki
2018-05-10AGESA f14 vendorcode: Only have f14 Ontario configKyösti Mälkki
2018-05-09vendorcode/amd/pi/00670F00: Control which procedure buildsRichard Spiegel
2018-05-09vendorcode/amd/pi/00670F00: Remove unneeded includesRichard Spiegel
2018-05-06AGESA: Remove remains of HT recoveryKyösti Mälkki
2018-05-06AGESA f14: Remove early HT initKyösti Mälkki
2018-05-06AGESA: Run ar with DTKyösti Mälkki
2018-05-03vendorcode/amd/agesa: Fix variable length array declarationKyösti Mälkki
2018-05-03vendorcode/amd/agesa: Fix variable length array declarationPaul Menzel
2018-04-27vendorcode/intel: Update GLK FSP Header files w.r.t FSP v2.0.2Srinidhi N Kaushik
2018-04-25vendorcode/amd/pi/00670F00: Remove include headerGarrett Kirkendall
2018-04-16vendorcode/amd/pi/00670F00: Remove unused headersGarrett Kirkendall
2018-04-16vendorcode/amd/pi/00670F00: Remove unused headersGarrett Kirkendall
2018-04-11Correct "MTTR" to "MTRR"Jonathan Neuschäfer
2018-04-06fsp/fsp2_0/coffeelake: Add Coffeelake FSP UPD HeadersNg Kin Wai
2018-04-06soc/cavium: import raw BDK sourcesDavid Hendricks
2018-04-06vc/amd/stoneyridge: Add definition for AGESA heap rebaseMarshall Dawson
2018-04-05intel/fsp: Update cannonlake fsp headerLijian Zhao
2018-03-23vendorcode/intel: Update FSP Header files per v2.0.0Srinidhi N Kaushik
2018-03-22intel/fsp: Update Cannonlake FSP headerLijian Zhao
2018-03-16stoneyridge: Update AGESA binary and AGESA.hRichard Spiegel
2018-02-14intel/fsp: Update cannonlake fsp headerLijian Zhao
2018-02-12vc/amd/00670F00: Introduce S3FinalRestore helperMarshall Dawson
2018-02-01vendorcode/amd/pi/00670f00: Update headers to AGESA 1.3.0.9Marc Jones
2018-01-31vendorcode/intel/fsp/fsp2_0: Add CannonLake FirmwareVersionInfoHob headerSubrata Banik
2018-01-31intel/fsp: Update cannonlake fsp headerLijian Zhao
2018-01-31vendorcode/intel/fsp: Remove TODOs and make use of EDK2 headerSubrata Banik
2018-01-31vendorcode/intel: Add Kconfig option to get UDK_VERSIONSubrata Banik
2018-01-31vendorcode/intel: Add UDK2017 supportSubrata Banik
2018-01-24AGESA f15 cimx/sb700: Remove vendorcode sourceKyösti Mälkki
2018-01-24AGESA f15 cimx/sb700: Remove unused chips codeKyösti Mälkki
2018-01-23binaryPI vendorcode: Remove HeapXXBuffer functionsKyösti Mälkki
2018-01-23AGESA_LEGACY: Apply final cleanup and file removalsKyösti Mälkki
2018-01-18security/tpm: Change TPM naming for different layers.Philipp Deppenwiese
2018-01-18security/tpm: Move tpm TSS and TSPI layer to security sectionPhilipp Deppenwiese
2018-01-17AGESA f15: Drop CAR teardown without POSTCAR_STAGEKyösti Mälkki
2018-01-05vendorcode/intel/fsp/fsp2_0/glk: Update header files as per v77_12Srinidhi N Kaushik
2018-01-05soc/amd/common: load post-memory AGESA as rmoduleAaron Durbin
2018-01-05soc/amd/common: Allow AGESA file split for pre- and post-memoryJustin TerAvest
2017-12-22vendor/intel/skykabylake: Update FSP header files to version 2.9.2Balaji Manigandan B
2017-12-13vc/amd/pi/0067F00: add option to add AGESA binary PI as stageAaron Durbin
2017-12-12vc/amd/pi/00670F00: fix #include paths to only use <amdblocks/header.h>Aaron Durbin
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