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AgeCommit message (Expand)Author
2021-02-01sb/intel/i82801gx,ix: Drop MPEN from GNVSKyösti Mälkki
2021-02-01soc/amd: Drop PCNT from GNVSKyösti Mälkki
2021-02-01mb/google/dedede/var/magolor: Configure Acoustic noise mitigation UPDsRen Kuo
2021-02-01soc/intel/elkhartlake: Config PlatformDebugConsentFrans Hendriks
2021-02-01lib/asan.c: Update SPDX licenseFrans Hendriks
2021-02-01soc/intel/common/sata: Add support for Cannon Lake SATA (HALO)Erik van den Bogaert
2021-02-01include/device/pci_ids.h: Add Cannon Lake PCH-H SATA dev IDErik van den Bogaert
2021-02-01console/console.h: Move get_console_loglevel() declarationArthur Heymans
2021-02-01drivers/security/cbnt: Fix bootblock sizeArthur Heymans
2021-02-01cpu/x86/mp_init.c: Print out the microcode revision of APsArthur Heymans
2021-02-01cpu/intel/microcode: Reuse existing function to read MCU revisionArthur Heymans
2021-02-01arch/x86/smbios: Add Number Of Power Cords field to be overridenJingleHsuWiwynn
2021-02-01nb/intel/haswell: Calculate TSEG limit from registersAngel Pons
2021-02-01nb/intel/haswell: Create RMRR for iGPUAngel Pons
2021-02-01sb/intel/lynxpoint: Use correct port mask for LPT-LPAngel Pons
2021-02-01mb/google/brya: Initiate peripheral busesEric Lai
2021-02-01mb/google/volteer: Select SOC_INTEL_CSE_LITE_SKU for volteer baseboardFurquan Shaikh
2021-02-01mb/google/volteer: Drop boldar variantFurquan Shaikh
2021-02-01mb/google/brya: Change EC -> PCH wake pin to GPP_F17Boris Mittelberg
2021-02-01Revert "mb/google/hatch/dratini: Describe the privacy_gpio"Ricardo Ribalda
2021-02-01ipmi/ocp: Move common OCP/Facebook IPMI OEM codes into drivers/ipmi/ocpJohnny Lin
2021-02-01soc/amd/stoneyridge/acpi: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-02-01soc/intel/broadwell/pch/sata.c: Don't enable Bus MasterAngel Pons
2021-02-01soc/intel/*: Get rid of custom microcode cachingPatrick Rudolph
2021-02-01device/oprom/include/x86emu/fpu_regs.h: Fix lint errorFrans Hendriks
2021-02-01drivers/intel/fsp2_0: Use CBFS_MCACHE when coreboot tears down CARArthur Heymans
2021-02-01soc/intel/xeon_sp: Use native CAR teardownArthur Heymans
2021-02-01drivers/intel/fsp2_0: Use coreboot postcar with FSP-TArthur Heymans
2021-01-31soc/intel/*: drop incomplete and unneeded check for DMI SRLOCKMichael Niewöhner
2021-01-31soc/amd/common/block/aoac: expand acronym in Kconfig help textFelix Held
2021-01-31mb/emulation/qemu-q35: Use common MADTAngel Pons
2021-01-31mb/emulation/qemu-q35: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-31soc/amd/cezanne/Kconfig: select common PSP gen2 supportFelix Held
2021-01-31soc/amd/picasso/psp: move soc_get_mbox_address to common PSP gen2 codeFelix Held
2021-01-31soc/amd/stoneyridge/psp: fix check of MSR_PSP_ADDR contentsFelix Held
2021-01-31soc/amd/picasso/psp: fix check of MSR_PSP_ADDR contentsFelix Held
2021-01-31soc/amd/*/psp: move MSR_CU_CBBCFG to common and rename to MSR_PSP_ADDRFelix Held
2021-01-31soc/amd/stoneyridge/southbridge: move PSP BAR hide bit to its registerFelix Held
2021-01-31soc/amd/cezanne: add soc/cpu.h with CPUID define for Cezanne A0 steppingFelix Held
2021-01-30sb/intel/ibexpeak: Drop invalid ME finalisation functionAngel Pons
2021-01-30soc/intel/broadwell/pch: Drop some `config_of` usesAngel Pons
2021-01-30soc/intel/broadwell: Move `ramstage.c` to PCH scopeAngel Pons
2021-01-30soc/intel/broadwell: Make `broadwell_init_pre_device` staticAngel Pons
2021-01-30soc/intel: Replace `SA_PCIEX_LENGTH` Kconfig optionsAngel Pons
2021-01-30device: Drop `mmconf_resource_init` functionAngel Pons
2021-01-30nb/intel/i945: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30nb/intel/gm45: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30nb/intel/x4x: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30nb/intel/pineview: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-30nb/intel/ironlake: Use MMCONF_BUS_NUMBER everywhereAngel Pons