coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2017-10-20	soc/intel/skylake: Add GNVS variables and include SGX ASL	Pratik Prajapati
2017-10-20	soc/intel/apollolake: Add GNVS variables and include SGX ASL	Pratik Prajapati
2017-10-20	intel/common/acpi: Add common SGX ASL	Pratik Prajapati
2017-10-20	vendorcode/amd/pi/00670F00: Remove S3 restore functions	Martin Roth
2017-10-20	soc/amd/common: Set AltImageBasePtr to 0	Martin Roth
2017-10-20	Stoney Ridge Platforms: cast AGESA tables to void *	Martin Roth
2017-10-20	Stoney Ridge Platforms: Make AGESA callout tables common	Martin Roth
2017-10-20	mainboard/pcengines/apu2: add apu3 and apu5 variants	Kamil Wcislo
2017-10-19	soc/amd/stoneyridge: Use macros for PCI_DEVFN calls	Chris Ching
2017-10-19	soc/amd/stoneyridge: Replace magic registers	Richard Spiegel
2017-10-19	intel/fsp: Update cannonlake FSP header	Lijian Zhao
2017-10-19	soc/intel/cannonlake: Fix HECI error on reset	Lijian Zhao
2017-10-19	soc/intel/cannonlake: Use EBDA structure to store soc reserve memory size	Subrata Banik
2017-10-19	soc/intel/skylake: Use EBDA structure to store soc reserve memory size	Subrata Banik
2017-10-19	soc/intel/cannonlake: Add IGD Support and pre-OS display code	Abhay Kumar
2017-10-19	siemens/mc_bdx1: Initialize GPIOs	Werner Zeh
2017-10-19	soc/fsp_broadwell_de: Add support for GPIO handling	Werner Zeh
2017-10-19	cpu/x86: add AMD registers to SMM save state	John E. Kabat Jr
2017-10-19	sb/intel/bd82x6x: Add new USB currents	Vagiz Trakhanov
2017-10-19	nb/sandybridge: Add a kconfig option to ignore XMP max DIMMs	Vagiz Trakhanov
2017-10-19	src/vendorcode/amd: Use AR variable in Makefiles	Martin Roth
2017-10-19	AGESA f14: Fix DDI maps in OemCustomize.c	Kyösti Mälkki
2017-10-19	AGESA: Split long lines in OemCustomize.c	Kyösti Mälkki
2017-10-19	AGESA f14: Drop PlatformGnbPcieComplex.h	Kyösti Mälkki
2017-10-19	pcengines/apu2: Add timestamps to romstage	Michał Żygowski
2017-10-19	Enable time stamp collection by default on x86	Paul Menzel
2017-10-19	google/chromeec: Do not set wake mask before logging EC events	Furquan Shaikh
2017-10-19	mb/google/poppy: Log EC events during S0ix resume	Furquan Shaikh
2017-10-19	ec/google/chromeec: Export google_chromeec_log_events in ec.h	Furquan Shaikh
2017-10-19	soc/intel/skylake: Probe XHCI for wake source for Internal PME	Furquan Shaikh
2017-10-19	soc/intel/skylake: Prevent false logs in pch_xhci_port_wake_check	Furquan Shaikh
2017-10-19	soc/intel/skylake: Define mask for SMI handlers that can be run in SCI mode	Furquan Shaikh
2017-10-19	soc/intel/skylake: Support logging wake source in SMM	Furquan Shaikh
2017-10-19	soc/intel/skylake: Move power_state functions to pmutil.c	Furquan Shaikh
2017-10-19	soc/intel/skylake: Use PCH_DEV_* instead of PCH_DEVFN_*	Furquan Shaikh
2017-10-19	soc/intel/skylake: Use newly added pmc_read_pm1_control	Furquan Shaikh
2017-10-19	soc/intel/apollolake: Use newly added pmc_read_pm1_control	Furquan Shaikh
2017-10-19	soc/intel/common/block/pmc: Add helper routines to read/write PM1_CNT	Furquan Shaikh
2017-10-19	soc/intel/common/block/pmc: Add new function pmc_fill_pm_reg_info	Furquan Shaikh
2017-10-19	elog: Support logging S0ix sleep/wake info in elog	Furquan Shaikh
2017-10-18	mainboard/intel/cannonlake_rvp: Enable hardware P state control	Vaibhav Shankar
2017-10-18	arch/x86: restore forwarding table on resume for EARLY_EBDA_INIT	Aaron Durbin
2017-10-18	soc/intel/cannonlake: Set platform Debug Probe Type	Lijian Zhao
2017-10-18	intel/cannonlake_rvp: Enable Audio DSP	Lijian Zhao
2017-10-18	intel/cannonlake_rvp: Declare PCIE clock usage	Lijian Zhao
2017-10-18	soc/intel/cannonlake: Update PCIE CLKREQ programing	Lijian Zhao
2017-10-18	soc/intel/cannonlake: Add finalize function	Lijian Zhao
2017-10-18	google/snappy: Override USB2 strength by SKUID	Kevin Chiu
2017-10-18	mb/google/fizz: skip reading SPD data when DUT resumes from S3	Gaggery Tsai
2017-10-18	soc/intel/cannonlake: Calculate soc reserved memory size	Subrata Banik