summaryrefslogtreecommitdiff
path: root/src
AgeCommit message (Collapse)Author
2014-11-25build system: unify linker use across gcc and clangPatrick Georgi
Let's just call ld directly for gcc, too. Change-Id: I305eb92ed0d21b098134a7eb5a9f9fe3b126aeea Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/7553 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-25build system: use a single variable name for compiler runtimesPatrick Georgi
We build with either gcc or clang, no need to keep both around Change-Id: I9af2cc7636bdc791a68ba8ed6e7c5a81973c5dfd Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/7552 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-11-24intel/fsp_baytrail: add new CPUID for Baytrail I step D0Herve ELter
Change-Id: I9e29ca10689cbbbaba593185868e54b8697aa9c4 Signed-off-by: Herve Elter <rvnvv74@gmail.com> Reviewed-on: http://review.coreboot.org/7523 Reviewed-by: Idwer Vollering <vidwer@gmail.com> Tested-by: build bot (Jenkins)
2014-11-24northbridge/amd/agesa: Remove useless northbridge.h headerEdward O'Callaghan
Remove northbridge.h headers which only contain static declaritions which is silly. Change-Id: I3e8890a34b4729bb0944bd97a3b9576b841d2354 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7532 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-24northbridge/amd/agesa/family15: Remove redudant prototypeEdward O'Callaghan
Function is static local only and so no need for a static prototype in header. Sync's header with other fam's also. Change-Id: I540aeafb8528e229700b6d596d4d8094c22e7625 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7531 Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-24northbridge/amd/agesa/family1{2,4}: make get_node_pci() staticEdward O'Callaghan
Function is local only, as is with other families also. Change-Id: I1f652be1763a319b2f1c9b0f53e76d6bc44f3450 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7530 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-11-24northbridge/amd/agesa/family1{4,5,5tn,6kb}: Reduce differencesEdward O'Callaghan
Lets cut down on whitespace differences, fix some typos and indents. Also make use of ARRAY_SIZE() macro instead of a local redefinition. Fix NULL pointer checks ordering and not to use zero. Change-Id: I93f344d300c04570d795659d848255cb1832e1d8 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7528 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-23usbdebug: Some fix for dongle compatibilityKyösti Mälkki
Not sure what this is about. Required for BeagleBone (not Black) with HUB in the middle, also old FX2 senses extra reset if we do this. Change-Id: I86878f8f570911ed1ed3ec844c232ac91e934072 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3868 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-23usbdebug: Reduce bus reset delaysKyösti Mälkki
According to EHCI specification, host controller software stops the USB Reset condition by writing PORT_RESET=0. Software then poll-waits this bit until controller hardware has completed USB Reset sequence and read returns with PORT_RESET==0. Change-Id: I6033c4d904c2af9eb16f5f3c1eb825776648cc1d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3863 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins)
2014-11-23usbdebug: Refactor descriptor probing of dongleKyösti Mälkki
Organized such that it is easy to support devices that do not export special Debug Descriptor. Some of these can still work in a fixed configuration and/or require additional initialisation for UART clocks etc. Change-Id: Id07fd6b69007332d67d9e9a456f58fdbca1999cd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7209 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins)
2014-11-23usbdebug: Move initialisation of the optional hubKyösti Mälkki
Add new file for device-specific initialisation transactions. Change-Id: I339df400a41675f178c7af613f03b2b44c826189 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7208 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins)
2014-11-23usbdebug: Refactor on EHCI memory spaceKyösti Mälkki
We only reference with ehci_caps and ehci_regs during initialisation, no need to carry those around. When EHCI BAR is relocated during PCI allocation, record the changed address even if usbdebug is not enabled. Use the DBGP_EP_VALID flags to determine if endpoints have been configured or not. Change-Id: Idfd52edf7c2fc25b1b225985462ac488264e4c6d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7207 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins)
2014-11-23usbdebug: Fix migration to ramstageKyösti Mälkki
On entry to ramstage CBMEM is looked for a copy of an already initialized EHCI debug dongle state. If a copy is found, it contained the state before CAR migration and the USB protocol data toggle can be out of sync. It's an even/odd kind of a parity check, so roughly every other build would show the problem as invalid first line: 'ug found in CBMEM.' After CAR migration, re-direct the state changes to correct CBMEM table. Change-Id: I7c54e76ce29af5c8ee5e9ce6fd3dc6bdf700dcf1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7206 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-11-23sandy/ivy/nehalem: Remerge interrupt handlingVladimir Serbinenko
On those chipsets the pins are just a legacy concept. Real interrupts are messages on corresponding busses or some internal logic of chipset. Hence interrupt routing isn't anymore board-specific (dependent on layout) but depends only on configuration. Rather than attempting to sync real config, ACPI and legacy descriptors, just use the same interrupt routing per chipset covering all possible devices. The only part which remains board-specific are LPC and PCI interrupts. Interrupt balancing may suffer from such merge but: a) Doesn't seem to be the case of this map on current systems b) Almost all OS use MSI nowadays bypassing this stuff completely c) If we want a good balancing we need to take into account that e.g. wlan card may be placed in a different slot and so would require complicated balancing on runtime. It's difficult to maintain with almost no benefit. Change-Id: I9f63d1d338c5587ebac7a52093e5b924f6e5ca2d Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7130 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-23lenovo/x201: Remove $PIR and MP tables.Vladimir Serbinenko
Not sure if they ever worked. Change-Id: I77cf090763aa7ac46480a5a9583985b10b02a267 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7551 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-23macbook21: Remove PIRQ table.Vladimir Serbinenko
This was copied from T60 which in turn copied from P2B-F without doing any modification. It never worked. Change-Id: I23fc8a7775df410d0f9735d1461dd9b80e54d076 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7554 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-22allwinner/a10: fix raminitPatrick Georgi
gcc 4.8.3 broke on it, and the u-boot code that this was derived from contains the same change. Change-Id: I3936567a1bee3eceb469373a81e464b1238fdf9c Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/7538 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-11-22amdk8: Move to implicit length patchingVladimir Serbinenko
Change-Id: I8b4c36adaa7ea791ae1a8f7c0d059b9201b08f94 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7332 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-22acpigen: Use implicit length patching in acpigen.cVladimir Serbinenko
Change-Id: I0aa333911edabd5c9f844a2171dfa9fafe7de785 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7364 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-11-22amdfam10: Move to per-device ACPIVladimir Serbinenko
Change-Id: I9ce2333e1ea527843f83d411dea2a669263156c2 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7027 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-22cpu/amd/agesa/family1{0,2}: Fix init introduction printf outputEdward O'Callaghan
Presumably this output made sense when the code was first being developed. Change-Id: I3380d6996838a9405b324d57ec449830ed88a99a Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7544 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-22cpu/amd/agesa/family1{0,2}: Fix indent and sync closer togetherEdward O'Callaghan
Change-Id: If1ca90aa8050fc1b2e1c98e0fb669de1d155a949 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7543 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-22drivers/net/ne2k.c: Fix regressionEdward O'Callaghan
Provide dummy ramstage symbol to keep the linker happy. Borked in commit fd95624 Change-Id: I2c49e82fec8eb936390cc3b30698f1bf73968c99 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7548 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins)
2014-11-22i945: Add 27ac to northbridge IDs.Vladimir Serbinenko
Change-Id: Ie2edf0738d0f27efa696b9f6c17600a97e323117 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7484 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-11-21intel/fsp_baytrail: add Gold3 FSP supportYork Yang
Baytrail Gold3 FSP adds a couple of parameters in UPD_DATA_REGION making platform more configurable via devicetree.cb Update the UPD_DATA_REGION structure and pass settings to FSP Add Baytrail Gold2 and earlier FSP backward compatible, as Gold3 FSP changes UPD_DATA_REGION struct Change-Id: Ia2d2d0595328ac771762a84da40697a3b7e900c6 Signed-off-by: York Yang <york.yang@intel.com> Reviewed-on: http://review.coreboot.org/7334 Reviewed-by: Martin Roth <gaumless@gmail.com> Tested-by: build bot (Jenkins)
2014-11-21cpu/amd/agesa/family1*: Use IS_ENABLED() macroEdward O'Callaghan
Change-Id: I54d6871597121392625293027a794d52cf28dd4c Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7542 Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-11-21northbridge/amd/agesa/Kconfig: Trivial - correct indentEdward O'Callaghan
Change-Id: Ia7d9cb77f83afda66a1fe4e1228f2728c94e1c99 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7535 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2014-11-21northbridge/amd/agesa: DEVICE_NOOP some stub functionsEdward O'Callaghan
Use 'DEVICE_NOOP' over stub functions to reduce loc and improve formalism. Change-Id: I9c8d608539647cce22fb1dfbe284a6043d3d23d9 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7534 Tested-by: build bot (Jenkins) Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2014-11-20amd/olivehillplus: Share agesawrapper headerKyösti Mälkki
This interface is common with AMD PI implementations. Change-Id: Ifabfce97db749e04aa19e53f62216be78158b282 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7150 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Tested-by: build bot (Jenkins)
2014-11-20AGESA: Remove redundant Avalon support from HudsonKyösti Mälkki
Avalon support now lives under pi/avalon so we can restore Hudson to the state before it was added there. Change-Id: Id96973f3458fae162232c160e602595b58c43027 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7389 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-11-20AMD: Isolate AGESA and PI build environments for southbridgeKyösti Mälkki
To backport features introduced with recent Chromebooks and/or Intel boards in general, heavy work on the AMD AGESA platform infrastructure is required. With the AGESA PI available in binary form only, community members have little means to verify, debug and develop for the said platforms. Thus it makes sense to fork the existing agesawrapper interfaces, to give AMD PI platforms a clean and independent sandbox. New directory layout reflects the separation already taken place under 3rdparty/ and vendorcode/. Change-Id: Ia730f0e45e7c1bdfc0c91e95eb6729a77773e2b9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7388 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Tested-by: build bot (Jenkins)
2014-11-20AMD: Isolate AGESA and PI build environmentsKyösti Mälkki
To backport features introduced with recent Chromebooks and/or Intel boards in general, heavy work on the AMD AGESA platform infrastructure is required. With the AGESA PI available in binary form only, community members have little means to verify, debug and develop for the said platforms. Thus it makes sense to fork the existing agesawrapper interfaces, to give AMD PI platforms a clean and independent sandbox. New directory layout reflects the separation already taken place under 3rdparty/ and vendorcode/. Change-Id: Ib60861266f8a70666617dde811663f2d5891a9e0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7149 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Tested-by: build bot (Jenkins)
2014-11-20AGESA: Refactor HUDSON_SATA_MODEKyösti Mälkki
Expose one CONFIG_ variable instead of seven to C preprocessor. Change-Id: Ib815127561d320a5e8f8e6ef168933d81809521e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7494 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-11-20Replace includes of build.h with version.hKyösti Mälkki
As build.h is an auto-generated file it was necessary to add it as an explicit prerequisite in the Makefiles. When this was forgotten abuild would sometimes fail with following error: fatal error: build.h: No such file or directory Fix this error by compiling version.c into all stages. Change-Id: I342f341077cc7496aed279b00baaa957aa2af0db Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7510 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-20vendorcode/amd/agesa/f15?tn: Reduce useless differencesSara Lelliott
Reduce inconsequential differences between fam15 and fam15tn to better prepare for possible merger. Change-Id: I016aa1a4cc45553d51190988d48c8a54cfd85f5a Signed-off-by: Sara Lelliott <sara@jupitercrash.org> Reviewed-on: http://review.coreboot.org/7503 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-11-20vendorcode/amd/agesa/f*/Porting.h: Sync files across fam'sEdward O'Callaghan
Sync up these 'Porting.h' headers to include fixes from each family on botched-up typedef's for primitive data types. Fix corresponding breakage introduced by typecasts in mainboards. Change-Id: I003b155cc6c860f6b0cd75667083634a04814473 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7512 Tested-by: build bot (Jenkins)
2014-11-20mainboard/apple/macbook21/romstage.c: Missing prototype headerEdward O'Callaghan
Fix warning thrown by Clang due to missing prototype for main entry point function in -ffreestanding. main() is as any other function in freestanding and so a prototype is strictly needed. Change-Id: Ic27e0f93065b1aa85d3979db61b5e2ff0dd2a310 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7518 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-11-20mainboard/intel/cougar_canyon2/romstage.c: Missing prototypeEdward O'Callaghan
Fix warning thrown by Clang due to missing prototype for main entry point function in -ffreestanding. main() is as any other function in freestanding and so a prototype is strictly needed. Change-Id: Icb29ced0306d5089049a35b1d8862f86a555ff1f Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7517 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-11-20mainboard/asus: Add F2A85-M LE variant to F2A85-M.Tobias Diedrich
The F2A85-M LE has less DRAM slots and needs different settings. Additionally, the audio codec verb table is different. Change-Id: I0e13c91fc924f4f9eac534fd13d57830654dd0aa Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de> Reviewed-on: http://review.coreboot.org/7356 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-11-20mainboard/asus/f2a85-m: Disable LEGACY_FREE settingTobias Diedrich
The ASUS F2A85-M has a keyboard controller, serial and parallel port and thus is not legacy free at all. Setting LEGACY_FREE causes some early bootup serial debug messages to be lost. Change-Id: Ibba38826e2f863c6e490e52bd5854e5dc0b6a357 Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de> Reviewed-on: http://review.coreboot.org/7480 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-11-20mainboard/asus/f2a85-m: Disable IMC build option.Tobias Diedrich
The A85 IMC is unused on this board, disable the build option. The original ASUS BIOS image does not contain any IMC firmware. Change-Id: I93fd50f2d4a85811ed43722e90f38864610f1cda Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de> Reviewed-on: http://review.coreboot.org/7385 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-11-19sb700: Make enable_fid_change_on_sb into normal functionVladimir Serbinenko
Change-Id: I2e1f04790b85e318bc1dc62e3590d9be2ee5ef52 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7378 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-11-19i82801ix,bd82x6x,ibexpeak: rewrite expresscard hotplugVladimir Serbinenko
This implementation is more compact, unified and works with windows as well. Tested under windows and under Debian GNU/Linux. Change-Id: I585dec12e17e22d829baa3f2dc7aecc174f9d3b5 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7296 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Tested-by: build bot (Jenkins)
2014-11-19i945: Add 0x27ae to GMA IDs.Vladimir Serbinenko
Change-Id: I4c9ccc52a7fe47311761e633c72e280055fb0310 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7485 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-11-19mainboard/amd/torpedo/Kconfig: Clean up formattingEdward O'Callaghan
Change-Id: Ifdfb78e39280af5017034b57e63c33b461b9b531 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7474 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2014-11-19broadwell: move to per-device ACPI.Vladimir Serbinenko
Change-Id: Icc4691f260521e7f3cc9388210c9b7631cf7ce18 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7363 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-19acpigen: Use implicit length patching in acpigen_write_resourcetemplate_footerVladimir Serbinenko
Change-Id: Ic177720b074fed13a17454dcb6765ac298365624 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7366 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-19acpigen: Add and use acpigen_write_device.Vladimir Serbinenko
The sequence of bytes to create a method is used several times in codebase. Put it into a function with logical arguments rather than duplicating magic bytes everywhere. Change-Id: I2c33fa403832eb1cfadfbf8d9adef5b63fb9cb24 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7348 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-11-19acpigen: Add and use acpigen_write_method.Vladimir Serbinenko
The sequence of bytes to create a method is used several times in codebase. Put it into a function with logical arguments rather than duplicating magic bytes everywhere. Change-Id: I0e55d8dc7d5e8e92a521c7a83117c470d0614008 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7347 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-19console: Isolate console_init() for ROMCCKyösti Mälkki
Change-Id: I623643834fb1c6af166a851fec7e31447944f0b6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7509 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-04 07:44:17 +0000