coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2016-08-04	soc/intel/skylake: Correct address of I2C5 Device	Barnali Sarkar
2016-08-04	lib/timestamp: Add timestamps to CBMEM in POSTCAR stage	Furquan Shaikh
2016-08-03	lenovo/x60: Fetch 16 bits when trying to parse bit 13	Patrick Georgi
2016-08-03	sb/amd/sb[6\|7\|8]00: Initialize PIC	Timothy Pearson
2016-08-03	spi/tpm: read TPM version in larger chunks	Vadim Bendebury
2016-08-03	google/gale: Add more board ID variants	Kan Yan
2016-08-03	google/gru: Add code to support I2C TPM for Kevin	Julius Werner
2016-08-03	google/gru: Add support for Gru rev1	Julius Werner
2016-08-03	soc/intel/quark: Support access to CPU CR registers	Lee Leahy
2016-08-03	mainboard/intel/galileo: Add FSP 2.0 Kconfig support	Lee Leahy
2016-08-03	soc/intel/quark: Add header files for FSP 2.0	Lee Leahy
2016-08-03	soc/intel/quark: Prepare for FSP2.0 support	Lee Leahy
2016-08-03	soc/intel/quark: Initialize MTRRs in bootblock	Lee Leahy
2016-08-03	soc/intel/quark: Remove use of EDK-II macros and data types	Lee Leahy
2016-08-03	fsp_broadwell_de: Add DMAR table to ACPI	Werner Zeh
2016-08-03	ACPI: Add code to create root port entry in DMAR table	Werner Zeh
2016-08-03	ACPI: Add code to include ATSR structure in DMAR table	Werner Zeh
2016-08-03	mainboard/intel/galileo: Remove use of EDK-II macros & data types	Lee Leahy
2016-08-03	soc/intel/quark: Make ramstage relocatable	Lee Leahy
2016-08-03	drivers/intel/fsp2_0: Update the debug levels	Lee Leahy
2016-08-03	drivers/intel/fsp2_0: Remove fsp_print_upd_info declaration	Lee Leahy
2016-08-03	drivers/intel/fsp2_0: Disable display of FSP header	Lee Leahy
2016-08-03	drivers/intel/fsp2_0: Handle FspNotify calls	Lee Leahy
2016-08-03	drivers/intel/fsp2_0: FSP driver handles all FSP errors	Lee Leahy
2016-08-03	drivers/intel/fsp2_0: Verify HOBs returned by FspMemoryInit	Lee Leahy
2016-08-03	drivers/intel/fsp2_0: Add display HOB support	Lee Leahy
2016-08-03	drivers/intel/fsp2_0: Add UPD display support	Lee Leahy
2016-08-03	drivers/intel/fsp2_0: Monitor FSP setting of MTRRs	Lee Leahy
2016-08-02	arch/riscv: Add include/arch/barrier.h	Jonathan Neuschäfer
2016-08-02	google/lars & intel/kunimitsu: Disable EC build	Martin Roth
2016-08-02	superio/fintek/f81866d: Add support for UART 3/4	Fabian Kunkel
2016-08-02	google/reef: Add pull up 20K for LPC SERIRQ	Kane Chen
2016-08-02	intel/amenia: Add GPIO changes to assert SLP_S0/Reset signal	Shankar, Vaibhav
2016-08-02	soc/intel/apollolake: Add iosstate macros for GPIO	Shankar, Vaibhav
2016-08-02	drivers/fsp2_0: Increment boot count for non-S3 boot	Furquan Shaikh
2016-08-02	intel/apollolake: Enable upper CMOS bank in bootblock	Furquan Shaikh
2016-08-02	elog: Include declarations for boot count functions unconditionally	Furquan Shaikh
2016-08-02	drivers/intel/fsp2_0: Display FSP calls and status	Lee Leahy
2016-08-02	i2c/w83795: Fix chip type message	Patrick Georgi
2016-08-02	amd/amdfam10: eliminate dead code	Patrick Georgi
2016-08-02	console: Drop leftover struct console_driver	Kyösti Mälkki
2016-08-02	intel/skylake: Fix UART build options	Furquan Shaikh
2016-08-02	intel/lynxpoint,broadwell: Fix eDP display in Windows, SeaBios & Tiano	Prabal Saha
2016-08-01	soc/intel/quark: Enable use of hard reset	Lee Leahy
2016-08-01	soc/intel/common: Fix build error in reset.c	Lee Leahy
2016-08-01	Remove non-ascii & unprintable characters	Martin Roth
2016-08-01	Add newlines at the end of all coreboot files	Martin Roth
2016-08-01	arch/x86: Enable postcar console	Lee Leahy
2016-08-01	arch/x86: Display MTRRs after MTRR update in postcar	Lee Leahy
2016-08-01	siemens/sitemp_g1p1: Fix typo	Patrick Georgi