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AgeCommit message (Expand)Author
2012-05-21Fix Persimmon build without S3.Marc Jones
2012-05-15Fix fadt legacy free setting.Marc Jones
2012-05-15Change the name of the romstage bootblock.ldMarc Jones
2012-05-15Fix Cygwin bootblock generationMarc Jones
2012-05-15Pass IASL to SeaBIOSMarc Jones
2012-05-14SPI driver: style fixPatrick Georgi
2012-05-12Add legacy free setting and override to fadt.cMarc Jones
2012-05-12Merge sb800 fadt fixes from South Station mainboard to southbridge fadt.Marc Jones
2012-05-11Hook up MRC cache updateStefan Reinauer
2012-05-11Rework Sandybridge MRC cache handlingStefan Reinauer
2012-05-10Add SPI flash driverStefan Reinauer
2012-05-10CIMx: Allow #define LEGACY_FREE overridesMartin Roth
2012-05-10Unmark source files as executablesAlec Ari
2012-05-10Integrate MA785GM-US2H to KconfigAlec Ari
2012-05-09Move fadt.c to the cimx sb800 southbridge directory to be shared.Marc Jones
2012-05-09Add simple PMIO & PMIO2 read/write routines to CIMX wrapperMartin Roth
2012-05-08Don't loop infinitely long on serial comm failuresStefan Reinauer
2012-05-08Some more #if cleanupPatrick Georgi
2012-05-08Add config_enabled() from LinuxPatrick Georgi
2012-05-08Clean up #ifsPatrick Georgi
2012-05-04Make CBFS output more consistentStefan Reinauer
2012-05-04siemens/sitemp_g1p1: Drop debug codePatrick Georgi
2012-05-04roda/rk886ex: Expose VGA devices in devicetreePatrick Georgi
2012-05-03Don't pre-enable SATA AHCI in romstage.cStefan Reinauer
2012-05-03Print some useful debugging information in PSS table creationStefan Reinauer
2012-05-03Make creation of CBMEM_ID_RESUME_SCRATCH depending on AgesaStefan Reinauer
2012-05-03Add missing newline to printk in Sandybridge init codeStefan Reinauer
2012-05-03Tell CBMEM pretty printer about MRC cacheStefan Reinauer
2012-05-03Fix register corruption during Intel Microcode updateStefan Reinauer
2012-05-02ChromeOS: drop unused debug header descriptionStefan Reinauer
2012-05-02Make Intel i5000 specific options only appear on i5000 systemsStefan Reinauer
2012-05-02Don't include console.h in microcode.c when compiling with ROMCCStefan Reinauer
2012-05-02Strip quotes from Sandybridge MRC blobStefan Reinauer
2012-05-02Sandybridge: Display platform information earlyVadim Bendebury
2012-05-01Fix issue with PCIe power management setupDuncan Laurie
2012-05-01Add an option to enable PCIe root port coalescingDuncan Laurie
2012-05-01Update PCIe Root Port _PRT to handle re-mapped functionsDuncan Laurie
2012-05-01Drop CONFIG_MAX_PHYSICAL_CPUS on non-AMD boardsStefan Reinauer
2012-05-01Fix SATA port map to only enable port 0Stefan Reinauer
2012-05-01Update Ivybridge GT power meter tablesDuncan Laurie
2012-05-01Update ivybridge graphics initializationDuncan Laurie
2012-05-01Fix TPM driver to work with multiple vendor TPMsStefan Reinauer
2012-05-01Don't disable ACPI in the S3 resume pathDuncan Laurie
2012-05-01Only send ME Dram Init Done message on SandybridgeDuncan Laurie
2012-05-01Modify DMI init for IvyBridgeVincent Palatin
2012-05-01add new LPC controller device ID valueVadim Bendebury
2012-05-01Allow device ID arrays in the PCI driver structureVadim Bendebury
2012-05-01Clean up Emerald Lake 2 mainboard directoryGabe Black
2012-05-01Allow more CPU cores on Emerald Lake 2 CRBStefan Reinauer
2012-05-01Set up ChromeOS dev mode, recovery, and write protect GPIOs on Emerald Lake 2.Gabe Black
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