coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2017-11-11	soc/intel/{cannonlake,skylake}: Add _soc_ prefix in spi soc routine	Subrata Banik
2017-11-11	soc/intel/common/block: Add Intel common SPI support	Subrata Banik
2017-11-10	google/kahlee: Use devicetree register values for UMA	Marshall Dawson
2017-11-10	soc/amd/stoneyridge: Add UMA settings to devicetree	Aaron Durbin
2017-11-10	amd/stoneyridge: Implement vboot_platform_is_resuming	Marshall Dawson
2017-11-10	amd/stoneyridge: Add function to find Pm1EvtBlk base	Marshall Dawson
2017-11-10	amd/stoneyridge: Remove dead southbridge definitions	Marshall Dawson
2017-11-10	amd/stoneyridge: Add more ACPI register definitions	Marshall Dawson
2017-11-10	amd/stoneyridge: Use the new generic acpi_sleep_from_pm1	Marshall Dawson
2017-11-10	amd/stoneyridge: Select AMD common sleep states	Marshall Dawson
2017-11-10	arch/x86: Add common AMD ACPI hardware definitions	Marshall Dawson
2017-11-10	soc/amd/stoneyridge: Use uint8_t as type for SPD address	Richard Spiegel
2017-11-10	soc/amd/stoneyridge: Simplify and fix SMBUS code	Richard Spiegel
2017-11-10	google/kahlee: Add defines in OemCustomize.c	Marshall Dawson
2017-11-10	google/kahlee: Move DRAM clear override to devicetree	Marshall Dawson
2017-11-10	soc/amd/common: Add DRAM clear option to northbridge.c	Richard Spiegel
2017-11-10	soc/intel/cannonlake: Remove structure variable initialization with 0	Subrata Banik
2017-11-10	soc/intel/common: Fix CSE common code to accomodate Skylake/Kabylake	Subrata Banik
2017-11-10	soc/intel/apollolake: Include HECI BAR0 address inside iomap.h	Subrata Banik
2017-11-10	src/soc/amd/stoneyridge/southbridge.h: Fix prototypes	Richard Spiegel
2017-11-10	mainboard/google/coral: power off EN_PP3300_DX_LTE_SOC when entering S5	Ben Chan
2017-11-10	device: untangle device_t from struct device some more	Aaron Durbin
2017-11-09	soc/amd/stoneyridge: Fix and clean lpc.c	Richard Spiegel
2017-11-09	mainboard/google/zoombini: add dptf.asl and gpio.h	Nick Vaccaro
2017-11-09	src/soc/amd/stoneyridge/southbridge.h: Remove unused prototypes	Richard Spiegel
2017-11-09	drivers/i2c/tpm/cr50: Increase init delay to 30 seconds	Duncan Laurie
2017-11-09	mainboard/google/zoombini: fix EC_SCI_GPI gpio define	Nick Vaccaro
2017-11-09	mb/google/{poppy,nautilus,soraka}: Disable deep S3	Furquan Shaikh
2017-11-09	mb/google/fizz: Enable NIC leds	Gaggery Tsai
2017-11-09	mainboard/google/kahlee: Move usb_oc.asl into variant/acpi	Martin Roth
2017-11-09	mainboard/google/kahlee: Define MEM_CONFIG3 for Kahlee variant	Martin Roth
2017-11-08	amd/stoneyridge: Add PSP definitions southbridge and iomap	Marshall Dawson
2017-11-08	amd/stoneyridge: Add SMU firmware blobs to cbfs	Marshall Dawson
2017-11-08	soc/amd/common/psp: Add command to load fw blobs	Marshall Dawson
2017-11-08	amd/stoneyridge: Remove fixme.c	Marshall Dawson
2017-11-08	amd/stoneyridge: Remove amdlib functions from fixme.c	Marshall Dawson
2017-11-08	amd/stoneyridge: Add northbridge register macros	Marshall Dawson
2017-11-08	google/fizz: add VBOOT_PHYSICAL_REC_SWITCH config	Shelley Chen
2017-11-07	mb/google/poppy/variants/nautilus: Enable Dialog DA7219 support	Naveen Manohar
2017-11-07	mb/google/poppy/variants/nautilus: add nhlt support	Naveen Manohar
2017-11-07	soc/intel/kabylake: Add Dialog da7219 NHLT blob support	Naveen Manohar
2017-11-07	intel/cannonlake_rvp: Clean up GPIO programming	Lijian Zhao
2017-11-07	src/mainboard/intel/glkrvp: Fix Lid switch support	Shaunak Saha
2017-11-07	mainboard/google/kahlee: Add MAINBOARD_FAMILY	Lann Martin
2017-11-07	siemens/mc_apl1: Select CONFIG_NC_FPGA_NOTIFY_CB_READY	Mario Scheithauer
2017-11-07	src: Fix all Siemens copyrights	Mario Scheithauer
2017-11-07	mainboard/intel/harcuvar: update to set the HSIO lines configuration	Julien Viard de Galbert
2017-11-07	soc/intel/denverton_ns: re-factor HSIO configuration	Julien Viard de Galbert
2017-11-07	device/device_util: Add string for DEVICE_PATH_NONE	Patrick Rudolph
2017-11-07	RISC-V boards: Stop using the config string	Jonathan Neuschäfer