Age | Commit message (Expand) | Author |
2016-11-09 | amd/cpu: Add details to chip names | Marshall Dawson |
2016-11-09 | nb/amd/amdmct/mct: Remove commented code | Elyes HAOUAS |
2016-11-09 | mainboard/roda: Use C89 comments style & remove commented code | Elyes HAOUAS |
2016-11-09 | nb/intel/i945/early_init.c: Add DDR2-667 detection for 945GC | Elyes HAOUAS |
2016-11-09 | cpu/intel: Add MSR to support enabling turbo frequency | Shaunak Saha |
2016-11-09 | AMD binaryPI: Delay ACPI S3 backup until ramstage loader | Kyösti Mälkki |
2016-11-09 | AGESA: Delay ACPI S3 backup until ramstage loader | Kyösti Mälkki |
2016-11-09 | ACPI S3: Remove HIGH_MEMORY_SAVE where possible | Kyösti Mälkki |
2016-11-09 | mainboard/google/reef: use common google smbios mainboard version | Aaron Durbin |
2016-11-09 | vendorcode/google: add common smbios mainboard version support | Aaron Durbin |
2016-11-09 | string.h: only guard snprintf() with __ROMCC__ | Aaron Durbin |
2016-11-09 | google/pyro: Update WACOM touchscreen ACPI _HID | Janice Li |
2016-11-09 | ec/acpi: Include ec.c unconditionally in romstage | Nico Huber |
2016-11-09 | Move select UDELAY_LAPIC from nb/gm45/Kconfig to cpu/model_1067x/Kconfig | Arthur Heymans |
2016-11-09 | nb/intel/gm45: Use LAPIC udelay instead of custom version | Arthur Heymans |
2016-11-08 | mb/lenovo/t400: use socket mPGA478MN instead of BGA945 | Arthur Heymans |
2016-11-08 | cpu/intel/socket_mPGA478MN: Add socket P | Arthur Heymans |
2016-11-08 | mb/gigabyte/ga-945gcm-s2l: add mainboard | Arthur Heymans |
2016-11-08 | soc/intel/apollolake: Provide chipset value for ifdtool | Andrey Petrov |
2016-11-08 | southbridge/intel: Set chipset in ifdtool invocations | Andrey Petrov |
2016-11-08 | nb/x4x/raminit.c: Improve crossclock table cosmetics | Arthur Heymans |
2016-11-08 | vboot: Wrap line in comment longer than 80 characters | Naresh G Solanki |
2016-11-08 | intel/kblrvp: Update mainboard configuration | Naresh G Solanki |
2016-11-08 | intel/e7501: Remove unused northbridge code | Kyösti Mälkki |
2016-11-08 | intel post-car: Split legacy sockets | Kyösti Mälkki |
2016-11-08 | quick_ram_check: Remove reference to RAMBASE | Kyösti Mälkki |
2016-11-08 | intel car: Remove references to DCACHE_RAM_ROMSTACK_SIZE | Kyösti Mälkki |
2016-11-07 | mainboard/intel/kblrvp: Remove unused code in dptf.asl | Naresh G Solanki |
2016-11-07 | mainboard/intel/kblrvp: Configure usb over current pin & cdclock | Naresh G Solanki |
2016-11-07 | mainboard/intel/kblrvp: Enable Build with ChromeOS | Naresh G Solanki |
2016-11-07 | mainboard/intel/kblrvp: Add Chrome EC switch | Naresh G Solanki |
2016-11-07 | intel/kunimitsu: Update DPTF settings | Sumeet Pawnikar |
2016-11-07 | google/lars: Update DPTF settings | Sumeet Pawnikar |
2016-11-07 | soc/intel/skylake: Add _ACx methods for TSR0 sensor for fan control | Sumeet Pawnikar |
2016-11-07 | lpss_i2c: Increase transaction timeout | Duncan Laurie |
2016-11-07 | soc/intel/{sky,apollo}lake: Wait until GPE is clear when reading | Duncan Laurie |
2016-11-07 | drivers/i2c/tpm/cr50: Increase IRQ timeout | Duncan Laurie |
2016-11-07 | southbridge/amd: Update Kconfig and makefiles for 00670F00 | Marc Jones |
2016-11-07 | amd/pi/hudson: Move audio to northbridge | Marshall Dawson |
2016-11-07 | vendorcode/amd: Update Kconfig and makefiles for 00670F00 | Marc Jones |
2016-11-07 | vendorcode/amd: Modify 0067F00 for binaryPI | Marshall Dawson |
2016-11-07 | vendorcode/amd: Copy 00670F00 files from PI package | Marshall Dawson |
2016-11-07 | vendorcode/amd: Copy 00660F01 directory to 00670F00 | Marc Jones |
2016-11-07 | arch/x86/acpigen: Add OperationRegion & Field method | Naresh G Solanki |
2016-11-07 | pci_ids.h: Correct recent AMD ID names | Marshall Dawson |
2016-11-07 | mainboard/google/reef: update DMIC related pins configuration | Sathyanarayana Nujella |
2016-11-07 | soc/intel/apollolake: Add pmc_ipc device support | Lijian Zhao |
2016-11-07 | soc/intel/skylake: Fix SATA booting to OS issue | Subrata Banik |
2016-11-07 | vboot: Disable vboot verification when Chrome EC disabled | Naresh G Solanki |
2016-11-07 | soc/intel/skylake: Avoid use of variable Local0 in TEVT in thermal.asl | Naresh G Solanki |