coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-10-17	vendorcode/amd: Fix typo in is defined in comments	Paul Menzel
2020-10-17	AGESA mb: Replace tab with space in macro definition for consistency	Paul Menzel
2020-10-17	vc/amd/Kconfig: Add missing dot in AMD domain www.amd.com	Paul Menzel
2020-10-17	superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A	Paul Menzel
2020-10-17	intel/txt: Add `txt_get_chipset_dpr` function	Angel Pons
2020-10-17	security/intel/txt: Improve MTRR setup for GETSEC[ENTERACCS]	Angel Pons
2020-10-17	sec/intel/txt: Bail if var MTRRs cannot snugly cache the BIOS ACM	Angel Pons
2020-10-17	trogdor/sc7180: Clarify USE_QC_BLOBS requirements	Julius Werner
2020-10-16	include/cpu/x86: introduce new helper for (un)setting MSRs	Michael Niewöhner
2020-10-16	soc/intel/skylake: Rename PcieRpAspm devicetree config	Benjamin Doron
2020-10-16	acpi/acpigen_dsm: fix I2C HID DSM to report correct function support	Josie Nordrum
2020-10-16	mb/google/zork: disable eMMC per FW_CONFIG for berknip	Kevin Chiu
2020-10-16	mb/intel/adlrvp: Enable Hybrid storage mode	Subrata Banik
2020-10-16	mb/intel/adlrvp: Enable PCIE RP11 for optane	Subrata Banik
2020-10-16	mb/intel/adlrvp: Fix SSD detection issue on ADL RVP	Subrata Banik
2020-10-16	mb/intel/adlrvp: Program GPIO for M.2 PCH SSD	Subrata Banik
2020-10-15	lib and libpayload: Add popcnt functions	Angel Pons
2020-10-15	soc/intel/xeon_sp: Add get_system_memory_map()	Marc Jones
2020-10-15	ec/google/chromeec: Update ec_commands.h	Yidi Lin
2020-10-15	Update bit field helpers to support more bit field operate	Huayang Duan
2020-10-15	sec/intel/txt/getsec_enteraccs.S: Save and restore MTRR_DEF_TYPE	Arthur Heymans
2020-10-15	nb/intel/haswell: Account for DPR region in memory map	Angel Pons
2020-10-15	security/intel/txt: Use `smm_region()` to get TSEG base	Angel Pons
2020-10-15	soc/intel/skylake: Configure L1 substates for PCH root ports	Benjamin Doron
2020-10-14	soc/intel/skylake/cpu.c: Fix comment coding style	Angel Pons
2020-10-14	mb/google/volteer: Disable HybridStorageMode for volteer baseboard	Shaunak Saha
2020-10-14	lib and libpayload: add 64-bit versions of clz, __ffs and log2	Tim Wawrzynczak
2020-10-14	mb/intel/adlrvp: Add ADL-P mainboard ASL code	Subrata Banik
2020-10-14	mb/intel/adlrvp: Add ADL-P ramstage mainboard code	Subrata Banik
2020-10-14	soc/intel/jasperlake: Enable CAR NEM enhanced mode	Aamir Bohra
2020-10-14	nb/intel/x4x: Place raminit definitions in raminit.h	Angel Pons
2020-10-14	nb/intel/x4x: Move register headers into a subfolder	Angel Pons
2020-10-14	mb/purism/librem_skl: Drop DQ and DQS byte maps	Angel Pons
2020-10-14	nb/intel/x4x: Clean up DMIBAR/EPBAR definitions	Angel Pons
2020-10-14	soc/intel/broadwell/xhci.c: Align with Lynx Point	Angel Pons
2020-10-14	soc/intel/broadwell/smi.c: Drop unused functions	Angel Pons
2020-10-14	soc/intel/broadwell/pcie.c: Add some null checks	Angel Pons
2020-10-14	haswell/lynxpoint: Align cosmetics with Broadwell	Angel Pons
2020-10-14	soc/intel/broadwell: Align cosmetics with Haswell/Lynx Point	Angel Pons
2020-10-14	soc/intel/broadwell/igd.c: Rename to gma.c	Angel Pons
2020-10-14	acpi/device: Add GPIO binding property for an array of GPIOs	Karthikeyan Ramasubramanian
2020-10-14	mb/google/dedede/var/madoo: Update DPTF setting	John Su
2020-10-14	src/ec/google/chromeec: Get Type-C Mux info from EC (TCPM)	Divya Sasidharan
2020-10-14	soc/intel/common/block: Enable PMC IPC driver	Brandon Breitenstein
2020-10-14	mb/intel/tglrvp: Enable Pcie WWAN m.2	Bora Guvendik
2020-10-14	mb/google/zork: Enable wake on wireless lan	Rob Barnes
2020-10-14	soc/intel/alderlake: Enable TME for Alder Lake	Subrata Banik
2020-10-14	vc/intel/fsp/fsp2_0/adl: Update FSP header to version 1332.01	Subrata Banik
2020-10-14	soc/intel/tigerlake: Enable and use USB4 PCIe driver	Duncan Laurie
2020-10-14	soc/intel/common: Add SSDT generation for Intel USB4 PCIe ports	Duncan Laurie