coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2021-01-31	mb/emulation/qemu-q35: Define and use MMCONF_BUS_NUMBER	Angel Pons
2021-01-31	soc/amd/cezanne/Kconfig: select common PSP gen2 support	Felix Held
2021-01-31	soc/amd/picasso/psp: move soc_get_mbox_address to common PSP gen2 code	Felix Held
2021-01-31	soc/amd/stoneyridge/psp: fix check of MSR_PSP_ADDR contents	Felix Held
2021-01-31	soc/amd/picasso/psp: fix check of MSR_PSP_ADDR contents	Felix Held
2021-01-31	soc/amd/*/psp: move MSR_CU_CBBCFG to common and rename to MSR_PSP_ADDR	Felix Held
2021-01-31	soc/amd/stoneyridge/southbridge: move PSP BAR hide bit to its register	Felix Held
2021-01-31	soc/amd/cezanne: add soc/cpu.h with CPUID define for Cezanne A0 stepping	Felix Held
2021-01-30	sb/intel/ibexpeak: Drop invalid ME finalisation function	Angel Pons
2021-01-30	soc/intel/broadwell/pch: Drop some `config_of` uses	Angel Pons
2021-01-30	soc/intel/broadwell: Move `ramstage.c` to PCH scope	Angel Pons
2021-01-30	soc/intel/broadwell: Make `broadwell_init_pre_device` static	Angel Pons
2021-01-30	soc/intel: Replace `SA_PCIEX_LENGTH` Kconfig options	Angel Pons
2021-01-30	device: Drop `mmconf_resource_init` function	Angel Pons
2021-01-30	nb/intel/i945: Define and use MMCONF_BUS_NUMBER	Angel Pons
2021-01-30	nb/intel/gm45: Define and use MMCONF_BUS_NUMBER	Angel Pons
2021-01-30	nb/intel/x4x: Define and use MMCONF_BUS_NUMBER	Angel Pons
2021-01-30	nb/intel/pineview: Define and use MMCONF_BUS_NUMBER	Angel Pons
2021-01-30	nb/intel/ironlake: Use MMCONF_BUS_NUMBER everywhere	Angel Pons
2021-01-30	nb/intel/sandybridge: Define and use MMCONF_BUS_NUMBER	Angel Pons
2021-01-30	nb/intel/haswell: Define and use MMCONF_BUS_NUMBER	Angel Pons
2021-01-30	soc/intel/broadwell: Define and use MMCONF_BUS_NUMBER	Angel Pons
2021-01-30	soc/intel/broadwell: Use common SMBus code	Angel Pons
2021-01-30	device/Kconfig: Introduce MMCONF_LENGTH	Angel Pons
2021-01-30	soc/intel/{baytrail,broadwell} Fix building with refcode blobs	Angel Pons
2021-01-30	sb/intel/bd82x6x: Clean up early_thermal.c	Angel Pons
2021-01-30	nb/intel/ironlake: Use RCBA macros	Angel Pons
2021-01-30	mb/amd/majolica: Add an empty bootblock function to handle GPIO	Zheng Bao
2021-01-30	mb/amd/majolica: Add an empty function of mainboard bootblock	Zheng Bao
2021-01-30	drivers/intel/fsp2_0: factor out and improve UPD signature check	Felix Held
2021-01-30	soc/amd,intel: Drop leftover GNVS includes	Kyösti Mälkki
2021-01-30	soc/amd/stoneyridge/southbridge: replace southbridge prefix with fch	Felix Held
2021-01-30	soc/amd/cezanne: add use result of acpi_is_wakeup_s3() in FSP calls	Felix Held
2021-01-30	soc/amd/picasso/chip: add missing acpi/acpi.h include	Felix Held
2021-01-30	soc/intel/common/block: Create PCIE related macros	Subrata Banik
2021-01-30	soc/intel/alderlake: Remove pch.h from SoC directory	Subrata Banik
2021-01-30	mb/intel/adlrvp: Remove unnecessary whitespace	Subrata Banik
2021-01-30	soc/amd/piasso/data_fabric: rename data_fabric_read_reg32	Felix Held
2021-01-30	soc/amd/picasso/data_fabric: factor out indirect address/index write	Felix Held
2021-01-29	soc/amd/cezanne: add empty ramstage FCH support	Felix Held
2021-01-29	soc/amd/picasso/fch: replace southbridge prefix with fch	Felix Held
2021-01-29	soc/amd/cezanne/chip: add FSP silicon init driver call	Felix Held
2021-01-29	soc/intel: Remove duplicate call to acpi_wake_source()	Kyösti Mälkki
2021-01-29	mb/emulation/qemu-q35: Consolidate host bridge definitions	Angel Pons
2021-01-29	mb/emulation/qemu-q35: Rename header	Angel Pons
2021-01-29	device/Kconfig: Declare MMCONF symbols' type once	Angel Pons
2021-01-29	mb/purism/librem_bdw: Turn comments into code	Angel Pons
2021-01-29	soc/intel: Drop CMEM from GNVS	Kyösti Mälkki
2021-01-29	soc/intel/baytrail,broadwell: Use resume_from_stage_cache()	Kyösti Mälkki
2021-01-29	stage_cache: Add resume_from_stage_cache()	Kyösti Mälkki