index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
Age
Commit message (
Expand
)
Author
2020-10-19
volteer+vendorcode: Retrieve Cr50 version only via SPI
Jes Klinke
2020-10-19
security/vboot: Rename mem_init.h to mrc_cache_hash_tpm.h
Shelley Chen
2020-10-19
soc/intel/skylake: Do not let FSP set the subsystem IDs
Benjamin Doron
2020-10-19
soc/intel/cannonlake: Fix memory corruptions
John Zhao
2020-10-19
soc/intel/common/acpi: correct indentation
Michael Niewöhner
2020-10-19
Revert "mb/google/zork/dalboz: Increase eMMC initial clock frequency"
Rob Barnes
2020-10-19
mb/google/dedede/var/waddledee: Enable GPIO based I2C Multiplexer
Karthikeyan Ramasubramanian
2020-10-19
drivers/i2c/gpiomux: Add chip driver for multiplexed I2C bus
Karthikeyan Ramasubramanian
2020-10-19
drivers/i2c: Add chip driver for GPIO based I2C multiplexer
Karthikeyan Ramasubramanian
2020-10-19
soc/amd/common/acpi: Convert to ASL 2.0 syntax
Elyes HAOUAS
2020-10-19
lib/imd: move struct definitions to a new header file
Jakub Czapiga
2020-10-19
vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2376
Ronak Kanabar
2020-10-19
amd/picasso/verstage: replace rsa accel with modexp
Kangheui Won
2020-10-19
mb/google/volteer: Enable USB4 retimer driver
Duncan Laurie
2020-10-19
drivers/intel/usb4: Add driver for USB4 retimer device
Duncan Laurie
2020-10-19
mb/google/kukui: Support SKU from camera EEPROM
Hung-Te Lin
2020-10-19
drivers/camera: Add config CHROMEOS_CAMERA
Yu-Ping Wu
2020-10-19
mb/google/volteer/elemi: Add memory.c for DDR4
Wisley Chen
2020-10-19
mb/purism/librem_skl: Clean up FSP-M RCOMP settings
Angel Pons
2020-10-19
mb/google/zork/var/vilboz: update dptc stapm time
John Su
2020-10-19
soc/intel/tigerlake: Reflow long lines
Sridhar Siricilla
2020-10-19
soc/intel/xeon_sp/cpx: Implement platform_fsp_silicon_init_params_cb
Marc Jones
2020-10-17
cpu/intel,soc/intel: drop Kconfig for hyperthreading
Michael Niewöhner
2020-10-17
superio: Add newline to log message about disabled mouse controller
Paul Menzel
2020-10-17
mb: AMD CIMx boards: Fix typo in *is defined* in comments
Paul Menzel
2020-10-17
vendorcode/amd: Fix typo in *is defined* in comments
Paul Menzel
2020-10-17
AGESA mb: Replace tab with space in macro definition for consistency
Paul Menzel
2020-10-17
vc/amd/Kconfig: Add missing dot in AMD domain www.amd.com
Paul Menzel
2020-10-17
superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A
Paul Menzel
2020-10-17
intel/txt: Add `txt_get_chipset_dpr` function
Angel Pons
2020-10-17
security/intel/txt: Improve MTRR setup for GETSEC[ENTERACCS]
Angel Pons
2020-10-17
sec/intel/txt: Bail if var MTRRs cannot snugly cache the BIOS ACM
Angel Pons
2020-10-17
trogdor/sc7180: Clarify USE_QC_BLOBS requirements
Julius Werner
2020-10-16
include/cpu/x86: introduce new helper for (un)setting MSRs
Michael Niewöhner
2020-10-16
soc/intel/skylake: Rename PcieRpAspm devicetree config
Benjamin Doron
2020-10-16
acpi/acpigen_dsm: fix I2C HID DSM to report correct function support
Josie Nordrum
2020-10-16
mb/google/zork: disable eMMC per FW_CONFIG for berknip
Kevin Chiu
2020-10-16
mb/intel/adlrvp: Enable Hybrid storage mode
Subrata Banik
2020-10-16
mb/intel/adlrvp: Enable PCIE RP11 for optane
Subrata Banik
2020-10-16
mb/intel/adlrvp: Fix SSD detection issue on ADL RVP
Subrata Banik
2020-10-16
mb/intel/adlrvp: Program GPIO for M.2 PCH SSD
Subrata Banik
2020-10-15
lib and libpayload: Add popcnt functions
Angel Pons
2020-10-15
soc/intel/xeon_sp: Add get_system_memory_map()
Marc Jones
2020-10-15
ec/google/chromeec: Update ec_commands.h
Yidi Lin
2020-10-15
Update bit field helpers to support more bit field operate
Huayang Duan
2020-10-15
sec/intel/txt/getsec_enteraccs.S: Save and restore MTRR_DEF_TYPE
Arthur Heymans
2020-10-15
nb/intel/haswell: Account for DPR region in memory map
Angel Pons
2020-10-15
security/intel/txt: Use `smm_region()` to get TSEG base
Angel Pons
2020-10-15
soc/intel/skylake: Configure L1 substates for PCH root ports
Benjamin Doron
2020-10-14
soc/intel/skylake/cpu.c: Fix comment coding style
Angel Pons
[next]