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2018-05-22Revert "program_loading: make types a mask, make unknown type a non-zero"Julius Werner
This reverts commit f3d99b6a657fe2bc3cff71956ab4f68fd1f287fe. Reason for revert: We're now doing this through CBFS types instead, so this shouldn't be needed anymore. Change-Id: I9e0d5446365f8ecc045615e4ba1a1313080c9479 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/26448 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-21Revert "acpi: device: Walk up the tree to find identifier"Duncan Laurie
This reverts commit 8ccf59a94778fb54cc08368fb58a42b64d9489f6. This wasn't meant to be submitted yet and seems to be causing issues, just as Patrick warned me.. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Change-Id: I8c4b57ba92ef4e0535e4975485188114a1084f09 Reviewed-on: https://review.coreboot.org/26452 Reviewed-by: Daniel Kurtz <djkurtz@google.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-21nb/amd/amdk8: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: If540a8b0afb93c1ba8e901c4771228a43c1e6a14 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26427 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21sb/sis/sis966: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: I6002949fa90a46a2dd0e3519acbf2606bb679322 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26398 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21nvidia/mcp55: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: I48ab6d77be0201ac7b49b26e0366b6e3a1e5ac52 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26400 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21sb/via/vt8237r: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: Ic4137bc4008d08e0e0d002e52c353fc29355ccb1 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26395 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21sb/via/k8t890: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: I2ff065c863a9d2b480f7432c6280ef59917c8863 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26396 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-21sb/amd/cs5536: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: I995981fbaaf8c22889920a81faae631b3fd3b2ef Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26415 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21sb/amd/amd8151: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: Id8a5043015806d8a433a948fc1889ee867ca3aeb Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26412 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21sb/amd/amd8132: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: Ia4be6e9b81fe4627d84c9ed7589a3e6ef2bcede2 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26411 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21sb/amd/amd8131: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: Iac87af2f1a1e331fee70b89548a0d6bbc5839ea0 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26410 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21sb/amd/amd8111: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: I143617bb1a4ab1812ec50155861ae2f75060851b Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26409 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21nb/via/cx700: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: Iaca908cc9ba5d11468a97d2f43911db925b93f1e Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26424 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21sb/amd/sb800: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: Ie48b42cf2999df075e23dc8ba185934b4e600157 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26405 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21sb/amd/sb700: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: I53acc7dd4ddf2787fc1e59d604cadc4f3b4cb49c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26406 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21sb/amd/sb600: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: I587b32e33af72a37be8299b9db2ce26ba825a689 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26407 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21sb/amd/rs690: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: I818f808e1cd8b156158251724352f8be6041030c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26418 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21google/kahlee: Reduce UMA memory to 32MBMarshall Dawson
Lower the amount of UMA memory to 32MB at AMD's request. TEST=none BUG=b:79906569 Change-Id: Ib1365dc38850b4b92c944ff95534573addbe4362 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/26383 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-21google/grunt: Reduce UMA memory to 32MBMarshall Dawson
Lower the amount of UMA memory to 32MB at AMD's request. TEST=boot Grunt, try S3 BUG=b:79906569 Change-Id: I5af038688b38b53c94b8265823eeee0f37980522 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/26382 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-21mb/google/octopus: Add devicetree for BipJustin TerAvest
Bip should have different devicetree entries than Yorp; it doesn't have a DA7219 audio codec (instead it uses ALC5682). BRANCH=none BUG=b:79771967 TEST=boot, no longer see DA7219 ACPI in console. Change-Id: Ic63bbc51e122afc9fc2e8ec7fb024d18a3815b38 Signed-off-by: Justin TerAvest <teravest@chromium.org> Reviewed-on: https://review.coreboot.org/26342 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
2018-05-21cimx/sb800: Use PCI_DEVFN()Kyösti Mälkki
Change-Id: I2d01714e2a72810fe1b6567e7f1b2aab00ac5c80 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/26430 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-21agesa/hudson pi/hudson: Use PCI_DEVICE_IDKyösti Mälkki
Change to 16bit read of the standard register. Change-Id: Id085935eb17838c07bd78716158e622f45f56906 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/26429 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-05-21agesa/hudson pi/hudson: Skip device node searchKyösti Mälkki
The device node with requested path is already known. Change-Id: I2de6a2a6893b1a24085ebcafd5d7604214ed10ef Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/26428 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-05-21sb/nvidia/ck804: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: I59078ff96428d134f108ff2551556c8a7d2d3b37 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26401 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-21sb/ricoh/rl5c476: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: I04a1fc27f67555132667e42f14fd0263a18b56c6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26399 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-21nb/via/vx800: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: Ib432d3c3ce2788b0138a1b0e852385ab4f9b65ee Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26425 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-21nb/via/cn700: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: Ic58bb58b88ffc309472ee9ffc8a9c8619659811b Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26423 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-21nb/intel/nehalem: Fix smashed stack in romstageMatthias Gazzari
Stack smashing was detected during raminit when not loading from MRC. Adding CAR_GLOBAL to a struct inside raminit was suggested in https://mail.coreboot.org/pipermail/coreboot/2018-May/086677.html in order to fix the problem. Adding CAR_GLOBAL to the ram timings variable solves the issue (adding it to the ram_training or raminfo struct had no effect). This is just a workaround and might need a proper fix in the future. Tested on Lenovo X201i with 2+2 and 4+4 GB RAM. Change-Id: I21b380db61be2aedc045201821d83e18e7d07ad1 Signed-off-by: Matthias Gazzari <mail@qtux.eu> Reviewed-on: https://review.coreboot.org/26388 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-20sb/amd/cimx/sb900: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: Id634edd7005db85690cdc93579c1f97588ffc5f8 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26416 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-20sb/amd/common: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: Ie16a1c131ec41eeccc0bf5235b3fc2341095d4a8 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26413 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-20nb/amd/agesa/family14: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: I9841fa591c4051653267b9e7c2f5b347d6f25b74 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26199 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-20sb/amd/agesa/hudson: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: I85aafdc204731734ba4f02551ba5ccdd6535df77 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26408 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-20nb/amd/agesa/family12: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: I265130532965c1655c34fd7dab6ca9ef0e27beca Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26198 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-20sb/amd/pi/hudson: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: Iace820ad788fde7b230f63d95543470ce925b451 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26417 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-20sb/amd/cimx/sb800: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: I2335b7e193663bb6c82bf267aaeb0b2367986f62 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26414 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-19lib/gnat: Drop Restriction `No_Exception_Propagation`Nico Huber
It turns out that even with the `-gnatp` switch to suppress runtime checks, the compiler is still allowed to generate them (it only doesn't have to). If we can't control generation of checks, we also can't make assumptions about propagation of their exceptions. The compiler warning that led to this change seems spurious, though (the check might be generated, but is dropped later). So we might revert this decision if the compiler can be fixed. Change-Id: I7470d74b1f96f90d0d15b24dfd636d5f1c778d46 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/26350 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-19mb/google/octopus: enable xdci controllerJagadish Krishnamoorthy
BUG=b:79343083 BRANCH=NONE TEST=On Yorp board, lspci should list xdci, 00:15.1 USB controller Change-Id: I3a4878389a1b5b7abcaccf6ab16b67848aaaee83 Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com> Reviewed-on: https://review.coreboot.org/26358 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-05-19mb/google/reef/variants/: Add new memory IDren kuo
Add a new RAM ID of memrory PN:K4F6E3S4HM-MGCJ BUG=b:78491470 TEST= emerge-coral coreboot chromeos-bootimage. Change-Id: Ic40e36ab222572945f8588eb3df063e4fe0dbeb5 Signed-off-by: Ren Kuo <Ren.Kuo@quantatw.com> Reviewed-on: https://review.coreboot.org/26365 Reviewed-by: Ren Kuo <ren.kuo@quantatw.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-19via/vx900: Remove leftover codeKyösti Mälkki
Code is not used with EARLY_CBMEM_INIT and it appears to have been invalid register anyways. Change-Id: If0662937b38aec71292113ce8abd88da0b73feee Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/26347 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-by: Martin Roth <martinroth@google.com>
2018-05-19cpu/x86: Add support to run function on single APSubrata Banik
This patch ensures that user can select a specific AP to run a function. BUG=b:74436746 BRANCH=none TEST=Able to run functions over APs with argument. Change-Id: Iff2f34900ce2a96ef6ff0779b651f25ebfc739ad Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/26034 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-19soc/intel/cannonlake: Add CONFIG_SMM_RESERVED_SIZE configSubrata Banik
This patch ensures to make SMM_RESERVED_SIZE for cannonlake platform else smm_subregion() returns 0 size. Change-Id: I6a95a244bbcf40d672fd11d1c62e01224b2554f2 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/26216 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
2018-05-18arch/x86: Increase TIMESTAMP region size to 0x200Furquan Shaikh
With the recent change 4c518e1 (timestamp: Add timestamps for TPM communication) to add more timestamps for TPM communication, now we are overflowing the TIMESTAMP region in verstage. This change increases TIMESTAMP region size to 512 bytes to accomodate this. BUG=b:79888151, b:79974682 Change-Id: I94c5403f256f0176d10ac61e9e1f60adf80db08b Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26360 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2018-05-18mb/google/eve: Describe USB devices in devicetreeDuncan Laurie
Describe the USB devices in the devicetree so they can get generated into the SSDT and presented to the OS. This was tested on an eve board and the resulting SSDT was verified to show the expected values in _UPC and _PLD. Change-Id: I292426f588ea74d61a5c4e4b01386bb18834c117 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/26176 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-05-18soc/amd/stoneyridge: Support ACPI USB code generationDuncan Laurie
To support generating USB devices in ACPI the platform needs to know how to determine a device name for each USB port, and for any root hubs that may be present. The AMD Stoney Ridge platform has separate controllers for USB 2.0 and USB 3.0. The USB 2.0 ports are connected through a hub to an EHCI controller while the USB 3.0 ports are directly connected to the xHCI controller. This topology is described in ACPI and the port names are exposed by the soc_acpi_name() function. The USB controllers are configured to scan for static USB devices in the devicetree and use the soc_acpi_name() function to identify them. Change-Id: I2bb677f84a49d2531929985dba319455b88e1686 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/26175 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-05-18soc/intel: Add support for USB ACPI code generationDuncan Laurie
To support generating USB devices in ACPI the platform needs to know how to determine a device name for each USB port, and for any root hubs that may be present. Recent Intel platforms route all ports to an XHCI controller through a root hub. This is supported by considering the root hub to be USB port type 0, the USB 2.0 ports to be type 2, and the USB 3.0 ports to be type 3. This was tested with a Kaby Lake platform by adding entries to the devicetree and checking the resulting SSDT. Change-Id: I527a63bdc64f9243fe57487363ee6d5f60be84ca Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/26174 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-05-18drivers/usb/acpi: Add a driver for generating USB ACPIDuncan Laurie
Add a support for generating USB port descriptors for ACPI based on their definition by the board in devicetree.cb. This will generate a _UPC and _PLD for each port, using a generic _PLD by default. The _PLD can also be customized for more accurate descriptions if necessary. This sample devictree.cb shows a USB 2.0 type-A port behind a root hub connected to an xHCI controller: device pci 14.0 on chip drivers/usb/acpi register "desc" = ""Root Hub"" register "type" = "UPC_TYPE_HUB" device usb 0.0 on chip drivers/usb/acpi register "desc" = ""USB 2.0 Type-A"" register "type" = "UPC_TYPE_A" device usb 2.0 on end end end end end It will generate the following ACPI code in the SSDT: Scope (\_SB.PCI0.XHCI.RHUB.HS01) { Name (_DDN, "USB 2.0 Type-A") Name (_UPC, Package (0x04) { 0xFF, 0x00, Zero, Zero }) Name (_PLD, ToPLD ( PLD_Revision = 0x2, PLD_IgnoreColor = 0x1, PLD_Red = 0x0, PLD_Green = 0x0, PLD_Blue = 0x0, PLD_Width = 0x0, PLD_Height = 0x0, PLD_UserVisible = 0x1, PLD_Dock = 0x0, PLD_Lid = 0x0, PLD_Panel = "UNKNOWN", PLD_VerticalPosition = "CENTER", PLD_HorizontalPosition = "CENTER", PLD_Shape = "RECTANGLE", PLD_GroupOrientation = 0x0, PLD_GroupToken = 0x0, PLD_GroupPosition = 0x0, PLD_Bay = 0x0, PLD_Ejectable = 0x0, PLD_EjectRequired = 0x0, PLD_CabinetNumber = 0x0, PLD_CardCageNumber = 0x0, PLD_Reference = 0x0, PLD_Rotation = 0x0, PLD_Order = 0x0, PLD_VerticalOffset = 0x0, PLD_HorizontalOffset = 0x0) ) } Change-Id: I7024390e407fda4b195211bd4755bb5ca53b2b37 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/26173 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-18acpi: device: Walk up the tree to find identifierDuncan Laurie
Instead of just checking the immediate parent for an device name, walk up the tree to check if any parent can identify the device. This allows devices to be nested more than one level deep and still have them identified in one place by the SOC. Change-Id: I9938fc20a839db91ff25e91bba08baa7421e3cd4 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/26172 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-18nb/common/intel: Remove the mrc cache codeArthur Heymans
This is now unused, since all intel northbridges now use the equivalent in drivers/mrc_cache. Change-Id: I3e4b4afa53acc0a82b4ba961f13f816b04931fea Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23485 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-18nb/intel/nehalem: Use the common mrc cache driverArthur Heymans
The common mrc cache driver allows to save the raminit training results to a separate fmap region which is more manageable than a cbfsfile. Change-Id: I25a6d3fe5466d142e3d10429a87b19047040c251 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23484 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-18intel/fsp: Update Cannonlake FSP headerLijian Zhao
Update Cannonlake FSP header to version 7.x.2E.50, the following changes were made, Memory Init UPD: 1. Add GDXC configuration options. 2. Remove some internal graphics memory selections. 2. Remove Fixed mid option for SaGv. 3. Add DualDimm per channel board type. 4. Remove PEG IMR options. Silicon Init UPD: 1. Add CD clock selections of 675MHz. 2. Remove Pcode PreWake/Rampup/RampDn time selections. 3. Remove C3 state demotion/unDemotion selections. BUG=None TEST=Build and boot up on meowth platform. Change-Id: I08ffb14df9f32089dbf44fa5bd3fc58a5bedb90d Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/26148 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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