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2009-09-29More consistent use of "default n" and "select XYZ" inPatrick Georgi
Kconfig files Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4685 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-28Trivial config fix for Serengeti Cheetah. Change a type and a default. Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4683 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-28Trivial config fix for Serengeti Cheetah. Remove duplication, add a default.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4682 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-26* drop libgcc from coreboot_apc.o, not needed.Stefan Reinauer
* wrap libgcc calls into regparm(0) variants so that coreboot can be compiled with other regparm values Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4679 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-25drop some dead code, clarify small comments and small cleanups to malloc.cStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4677 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-25improve lzma error messages. When coreboot panics because lzma decompressionStefan Reinauer
goes wrong, it might not be clear that it's lzma that failed, if the log level is low enough.. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4676 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-25Trivial fixups to get this board further along. Ronald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4675 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-25Fix build of romcc boards.Myles Watson
Invalid option specified: -mcpu=-mcpu=p2 romcc 0.71 released 03 April 2009 Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4674 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-25some progress on kconfig:Patrick Georgi
- northbridges are done - southbridges are done - Intel CPUs are done, with a design that the board only has to specify the socket it has, and the CPUs are pulled in automatically. There is some more cleanup possible in that area, but I'll do that later - a couple more mainboards compile: - intel/eagleheights - intel/jarrell - intel/mtarvon - intel/truxton - intel/xe7501devkit - sunw/ultra40 - supermicro/h8dme - tyan/s2850 - tyan/s2875 - via/epia - via/epia-cn - via/epia-m - via/epia-m700 - via/epia-n - via/pc2500e (PPC not considered, probably overlooked something) All of them only _build_, but some options are probably completely wrong. To be fixed later Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-25Rename CONFIG_SERIAL_CONSOLE to match newconfig.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4672 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-24Make build_opt_tbl depend on config.h since it uses it. This fixes:Myles Watson
GEN build/build.h OPTION option_table.h Error - Range end (122) does not match define (125) in line checksum 392 983 984 This happens when you switch from one board to another with incompatible CMOS defines. 'make clean' didn't help. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4671 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-24Remove HyperTransport support from boards that don't need it.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4670 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-24Re-enable option table for the ASUS MEW-VM and fix build.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4669 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-24Make all Kconfig enabled boards build (tested with kbuildall).Patrick Georgi
Also enable building individual boards with kbuildall for debugging. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4666 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-23fix some wrong versions of the FSF's address (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4664 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-23Fix the bounce_size global so that the bounce buffer works with CBFS.Myles Watson
Make self_boot() static. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4663 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-23Looks like this should have become cpu init code after growing up. TheStefan Reinauer
remaining questions are: - Why was it never used? - Why is it in /src and not in /src/cpu/ppc? Given this is dead code and part of an unmaintained powerpc port, I consider removing it trivial. (The code really does not do much) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4662 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-23simplify source tree hierarchy: move files from sdram/ and ram/ to lib/Stefan Reinauer
It's only three files. Also fix up all the paths (Gotta love included C files) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4661 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-23Add Kconfig support for Tyan s2881.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4660 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-23Separate payload compression from stage compression.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4659 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22Fix compilation for serengeti when HAVE_ACPI_TABLES is set. Trivial.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22src/Kconfig: Remove HT-specific options.Myles Watson
src/cpu/amd/socket_F/Kconfig: Remove second occurrence of CPU_SOCKET_TYPE. src/mainboard/amd/serengeti_cheetah/Kconfig: Add HT_CHAIN_UNITID_BASE here, since it is board specific. src/mainboard/tyan/s289X/Kconfig: Fix typo and change APIC_ID_OFFSET to match old config. src/devices/Kconfig: Change default value of *_PLUGIN_SUPPORT to match old config. src/southbridge/amd/amd8131/Makefile.inc: Remove check since it was a typo, and the correct variable is checked in the parent directory. src/Makefile:Use devicetree.cb instead of Config.lb to generate static.c. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4657 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22failoverR.diff: Revert my failover change since Kconfig only supports fallback.Myles Watson
kconfig_s2892.dif: Add support for Tyan s2891, s2892, and s2895 to Kconfig. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4656 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22tables.diff: Add Kconfig dialogues for ACPI, MP_TABLE, ...Myles Watson
Kconfig_bools.diff: Change some more ints to bools, change some default values. xip_size.diff: Make XIP_SIZE + XIP_BASE add up to 4GB. smp.diff: set CONFIG_SMP based on MAX_CPUS. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4655 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22Kill dead comment.Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4650 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22Help text for maximum and default console loglevel in Kconfig.Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4649 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22r4534 introduced devicetree.cb in every mainboard directory, but didn'tCarl-Daniel Hailfinger
copy any comment lines before the start of the device tree. Fix up amd/pistachio and technexion/tim8960. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4648 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22r4646 enabled early usage of pci_{read,write}_config{8,16,32}Carl-Daniel Hailfinger
This allows us to change dword = pci_cf8_conf1.read32(&pbus, sm_dev->bus->secondary, sm_dev->path.pci.devfn, 0x64); to the much more readable dword = pci_read_config32(sm_dev, 0x64); Clean up all PCI operations in mainboards based on AMD 690: amd/pistachio amd/dbm690t technexion/tim8690 Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4647 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22If no pci access method has been set for the device tree so far (e.g.Carl-Daniel Hailfinger
during early coreboot_ram), pci_{read,write}_config{8,16,32} will die(). This patch changes pci_{read,write}_config{8,16,32} to use the existing PCI access method autodetection infrastructure instead of die()ing. Until r4340, any usage of pci_{read,write}_config{8,16,32} in coreboot_ram before the device tree was set up resulted in either a silent hang or a NULL pointer dereference. I changed the code in r4340 to die() properly with a loud error message. That still was not perfect, but at least it allowed people to see why their new ports died. Still, die() is not something developers like to see, and thus a patch to automatically pick a sensible default instead of dying was created. Of course, handling PCI access method selection automatically for fallback purposes has certain limitations before the device tree is set up. We only check if conf1 works and use conf2 as fallback. No further tests are done. This patch enables cleanups and readability improvements in early coreboot_ram code: Without this patch: dword = pci_cf8_conf1.read32(&pbus, sm_dev->bus->secondary, sm_dev->path.pci.devfn, 0x64); With this patch: dword = pci_read_config32(sm_dev, 0x64); Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4646 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-17I forgot to add CONFIG_VGA_BRIDGE_SETUP to the old build system.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4645 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-17Remove warnings from Kconfig. Trivial.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4644 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-17Separate CONFIG_VGA_CONSOLE from CONFIG_VGA_BRIDGE_SETUP.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4643 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-17Move VGA BIOS settings from the payload menu into it's own menuPeter Stuge
Remove dependency on PAYLOAD_ELF so that config items are shown. Build tested. With this, coreboot.rom has a VGA BIOS optionrom added. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4642 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-17This is a patch for killing IPMI on the s1850 -- or at least geting the BMCRonald G. Minnich
out of the way of the serial port. Tested extensively in user mode. Works and gets the BMC out of my way, which is good, because there are few more useless things than IPMI and the BMC. The BMC, all by itself, is the cause of most of our problems in booting and talking to these nodes. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4640 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-17copyright name error. Ronald G. Minnich
I don't know what else to do for files generated by programs ... Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4639 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-15This is an otherwise dead platform. I'm just committing the basics that Ronald G. Minnich
let it build. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4636 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-15Don't mix int and boolean for kconfig variables. It might work, it might not.Patrick Georgi
trivial change. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4635 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-14Use the coreboot pci config read/write functions instead of direct cf8/cfcMarc Jones
access. The fam10 pci functions will use mmio and do not have SMP pci access issues. Signed-off-by: Marc Jones <marcj303@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4633 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-04Use driver-y instead of obj-y for model_6xx_init.o.Uwe Hermann
Otherwise booting (but not building) fails: Initializing CPU #0 CPU: vendor Intel device 665 CPU: family 06, model 06, stepping 05 Unknown cpu This patch was tested to fix the issue on MSI MS-6178. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4626 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-01As more users of Asus M2V-MX SE emerged. Here is long pending patch I wanted toRudolf Marek
write. It boots the SB/NB V-link performance to full duplex 533MB/s. (in fact x2 for FDX) The default was 266MB/s but half duplex only. If you encourage any stability issues we need to look into fine tuning the bus. The values are VIA recommended. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4625 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-29File I missed committing.Ronald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4619 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-29This is the final set of changes to allow rumba to build. Rumba is notRonald G. Minnich
tested. I also addressed questions raised by Uwe: TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 UDELAY_TSC Are now defined as booleans in src/cpu/x86/Kconfig and can be selected in the mainboard Kconfig. The remaining question of Uwe's is a deeper problem: --- We'll have to check if this works. From a quick glance the Rumba does not have the mmx related lines (which _are_ in Makefile.romccboard.inc, though): crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc crt0-y += ../../../../src/cpu/x86/mmx/enable_mmx.inc crt0-y += auto.inc crt0-y += ../../../../src/cpu/x86/mmx/disable_mmx.inc --- We're going to need a whole variant of this standard mainboard OR we're going to have to make (some) of the unconditional includes above conditional. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4618 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-29Set the mainboard/amd directory up to support more than one. Ronald G. Minnich
remove Config variables now defined elsewhere. add rumba Kconfig and Makefile.inc rumba won't build until my earlier patches are acked. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4617 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-29Fixes per Uwe's comments.Ronald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28This patch adds VGA and PS/2 Keyboard/mouse support to the already existing ↵Arnaud Maye
intel truxton (ep80579) dev board. This patch tries to improve the pcie portA configuration. The Matrox G550e PCIe gfx card shipped along with the dev board is supported. Signed-off-by: Arnaud Maye <arnaud.maye@4dsp.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4615 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28r4534 introduced devicetree.cb in every mainboard directory, but didn'tCarl-Daniel Hailfinger
copy any comment lines before the start of the device tree. Copy over the comments for amd/dbm690t. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4614 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28Add kconfig support for all Intel 82810 (i810) boards.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4613 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28kconfig: Board name variable fixes and updates (trivial).Uwe Hermann
- Use alphabetical order. - Drop non-exisiting vendors. - Add missing vendors (Mitac, Soyo, Technologic, TeleVideo). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4612 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28This is the beginning of support for Geode and Kconfig in v2. Ronald G. Minnich
It also brings in the vsm from v3, which was a much cleaner cut. Over time, I hope to bring all the code back from v3. I have some rumbas at home and want to use them. I have a patch which comes in next that makes the rumba build. Note that I am holding the src/*/amd/Kconfig patch until these get merged. These have no impact on the current system. Note that this is not complete but I want to fill in the blanks bit by bit. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4611 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28Move DCACHE support into the cpu family for AMD model_fxx.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4610 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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