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AgeCommit message (Expand)Author
2018-09-15soc/sifive: move ram_resource to mainboardPhilipp Hug
2018-09-15arch/x86/acpi_bert_storage.c: Fix coverity error CID 1395706Richard Spiegel
2018-09-15arch/riscv: Configure delegation only if S-mode is supportedJonathan Neuschäfer
2018-09-15pcengines/apu2: enable IOMMU for all apu2 variantsPiotr Król
2018-09-15nb/amd/pi/00730F01: Add initial native IVRS supportTimothy Pearson
2018-09-15nb/amd/pi/00730F01: Initialize IOMMU deviceKyösti Mälkki
2018-09-15mb/asrock/g41c-gs: Add more buildin PCI devices to the devicetreeArthur Heymans
2018-09-14drivers/intel/gma: Do not rely on CBLV in OpRegion Mailbox3Nico Huber
2018-09-14arch/x86/acpigen: Fix comment in _ROM method generatorJonathan Neuschäfer
2018-09-14nb/intel/sandybridge: Don't add SMBIOS Table 17 entries on resumeNico Huber
2018-09-14device/ddr3: Prevent overflow when adding SMBUS Table 17 entriesNico Huber
2018-09-14arch/riscv: Only execute on hart 0 for nowPhilipp Hug
2018-09-14soc/intel/denverton_ns: Enable common block PMCJulien Viard de Galbert
2018-09-14ec/lenovo/pmh7: support 9bit address spaceAlexander Couzens
2018-09-14soc/sifive/fu540: Implement uart_platform_refclk for UART divisor calculationPhilipp Hug
2018-09-14soc/sifive/fu540: Initialize SDRAMPhilipp Hug
2018-09-14soc/sifive/fu540: Switch clock to 1GHz in romstagePhilipp Hug
2018-09-14soc/sifive/fu540: create ram_resource with actual memory sizePhilipp Hug
2018-09-14arch/riscv: provide a monotonic timerPhilipp Hug
2018-09-14soc/sifive/fu540: add SiFive supplied header files for SDRAM initializationPhilipp Hug
2018-09-14mb/google/octopus: Query the EC for board versionKarthikeyan Ramasubramanian
2018-09-14arch/riscv: add missing endian.h header to io.hPhilipp Hug
2018-09-14mb/google/octopus: fetch DRAM part number from CBI for phaser after DVT phasepeichao.wang
2018-09-14complier.h: add __always_inline and use it in code baseAaron Durbin
2018-09-13soc/sifive/fu540: Get SDRAM controller out of resetPhilipp Hug
2018-09-13soc/sifive/fu540: Update clock settings according SiFive bootloaderPhilipp Hug
2018-09-13uart/sifive: make divisor configurablePhilipp Hug
2018-09-13src/mainboard/*/*: Set Mini-ITX boards' category to "mini"Angel Pons
2018-09-13src/*/intel: introduce warning when building with no IFDAngel Pons
2018-09-13src/*/intel/: clarify Kconfig options regarding IFDStefan Tauner
2018-09-12soc/sifive/fu540: Initialize PLL and clockPhilipp Hug
2018-09-12mainboards: Add SMMSTORE region in chromeos configsPatrick Georgi
2018-09-12soc/amd/stoneyridge: Fix more GPIO functionsJonathan Neuschäfer
2018-09-12rammus: add SPD mapping for rammus and shyvana supportkane_chen
2018-09-11amd/stoneyridge: Enable BERT table generationMarshall Dawson
2018-09-11amd/stoneyridge: Set BERT region size when no TSEG usedMarshall Dawson
2018-09-11soc/intel/baytrail: Remove trailing space in log messagePaul Menzel
2018-09-11src/device/dram: Fix typoElyes HAOUAS
2018-09-10soc/sifive: fix compiler warningPhilipp Hug
2018-09-10soc/sifive/fu540: Makefile: include mtime_init in ramstagePhilipp Hug
2018-09-10mb/google/poppy/variants/nami: Add SPD for two memory partsRen Kuo
2018-09-10soc/sifive/fu540: Add driver for OTP memoryPhilipp Hug
2018-09-10mainboard/google/poppy/variants/rammus: Enable DA7219marxwang
2018-09-10soc/intel/cannonlake: Correct number of root ports for CNL PCH HMaulik V Vaghela
2018-09-10riscv: update misaligned memory access exception handlingXiang Wang
2018-09-10soc/sifive/fu540: add CLINT supportXiang Wang
2018-09-10riscv: update mtime initializationXiang Wang
2018-09-10complier.h: add __noreturn and use it in code baseAaron Durbin
2018-09-10mb/google/poppy: Set UPD CmdTriStateDis for NocturneShaunak Saha
2018-09-10soc/intel/skylake: Add support for CmdTriStateDis UPD in devicetreeShaunak Saha