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AgeCommit message (Expand)Author
2011-10-21Add macros for 64bit byte order swappingStefan Reinauer
2011-10-20T60: Add support for Ultrabay Legacy I/O devices (40Y8122)Sven Schnelle
2011-10-20i82801dx: Replace romstage printk'sKyösti Mälkki
2011-10-19asrock/e350m1: Enable the superio ACPI device in devicetree.cbPeter Stuge
2011-10-19IOAPIC: fix bitmaskKyösti Mälkki
2011-10-19sconfig: check whether component directory actually existsStefan Reinauer
2011-10-19Drop eh_frame instead of moving it into the image.Stefan Reinauer
2011-10-19I945: replace #if defined() by #ifSven Schnelle
2011-10-18Append logical PME/GPIO device. Fix MPU device number.Kyösti Mälkki
2011-10-18Activate older Xeon P4 microcodesKyösti Mälkki
2011-10-17Fix our CMOS checksum algorithm so it matches what /dev/nvram expectsStefan Reinauer
2011-10-17rework RTC driver output to make it more consistent.Stefan Reinauer
2011-10-17Re-worked devicetree.cb for DL145 G1Oskar Enoksson
2011-10-17Fixes several issues with amd k8 SSDT P-state generationOskar Enoksson
2011-10-15SMM: Move wbinvd after pmode jumpStefan Reinauer
2011-10-15use byteorder.h instead of implementing another byte swap functionStefan Reinauer
2011-10-15AMD CPU and chipset fixes for compilation with gcc 4.6Stefan Reinauer
2011-10-15use acpi.h include instead of manually adding acpi_slp_type.Stefan Reinauer
2011-10-15cbfs_and_run_core() is not part of the API, make it static.Stefan Reinauer
2011-10-15reformat Makefile.bootblock.inc (>80 lines per char)Stefan Reinauer
2011-10-14Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6Stefan Reinauer
2011-10-14Fix compilation of AMD GX2 northbridge code with gcc 4.6Stefan Reinauer
2011-10-14Fix compilation of VIA CN700 northbridge code with gcc 4.6Stefan Reinauer
2011-10-14fix compilation of intel/sch northbridge code with gcc 4.6Stefan Reinauer
2011-10-14Add eh_frame to rom section to fix compilation of coreboot with gcc 4.6Stefan Reinauer
2011-10-13Prevent build breakage without consoles enabledStefan Reinauer
2011-10-13Load an IDT with NULL limitStefan Reinauer
2011-10-13Fix compilation of x86emu with gcc 4.6.xStefan Reinauer
2011-10-13Fix native x86 option rom initializationStefan Reinauer
2011-10-13refactor vesa mode setting code and bootsplash codeStefan Reinauer
2011-10-13Refactor option rom initialization code in coreboot.Stefan Reinauer
2011-10-13Enable/fix compilation of i8254 code in ram stage.Stefan Reinauer
2011-10-13Use default table creator macro for all SSDTsStefan Reinauer
2011-10-13Fix romstage creation with gcc 4.6 and CAR targetsStefan Reinauer
2011-10-13siemens/sitemp_g1p1: Don't mess with virtual wire settingsPatrick Georgi
2011-10-13siemens/sitemp_g1p1: Get rid of bus_isa and bus_typePatrick Georgi
2011-10-13amd/sb600: Enable COM2 at all times in early setupPatrick Georgi
2011-10-13mptable: Refactor mptable generation some morePatrick Georgi
2011-10-13mptable: Get rid of fixup_virtual_wirePatrick Georgi
2011-10-13mptable: Refactor lintsrc generationPatrick Georgi
2011-10-13Make Asus A8V-E SE better ACPI citizen.Rudolf Marek
2011-10-12w83627hf: ASL include containing virtual device tree of the SuperIOChristoph Grenz
2011-10-12amdk8: ASL include for K8 temperature sensor support in ACPIChristoph Grenz
2011-10-12SB800 RAID: add kconfig option RAID_MISC_ROM_POSITIONKerry Sheh
2011-10-12SB800: Sata Enable bus master and enable ahci for AHCI/RAID modeKerry Sheh
2011-10-12avalue/eax-785e: Get SATA Mode from Kconfig optionKerry Sheh
2011-10-12sb800: Add Kconfig option ENABLE_IDE_COMBINED_MODEKerry Sheh
2011-10-12persimmon: complete the sb800 devicetreeKerry Sheh
2011-10-11Fixed broken MTRR for >4GB memory on AMD K8 fam 0fh rev <=EOskar Enoksson
2011-10-11mainboard: complete the sb800 devicetree even device is offKerry Sheh
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