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2011-06-15CMOS: add set_option()Sven Schnelle
Change-Id: I584189d9fcf7c9b831d9c020ee7ed59bb5ae08e8 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/23 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-06-13X60/T60: set CMOS defaultsSven Schnelle
Change-Id: I5789a03898cdbade67887c0389aab5c773f867d9 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/26 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-06-12ASRock/E350M1: Skip memory clear for boot time reductionMarshall Buschman
Applying Scott's patches to e350m1, svn r6600: Memory clear is not required for non-ECC boards. Change-Id: Ia1a7c926611de72351434cbdc1795ed10bc56ed1 Signed-off-by: Scott Duplichan <scott@notabs.org> Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Reviewed-on: http://review.coreboot.org/20 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2011-06-12X60/T60: fix return value of mainboard_io_trap_handler()Sven Schnelle
The handler should return 1 if it handled the request. The current code returns 0, which causes 'Unknown function' logs. Change-Id: Ic296819a5f8c6f1f97b7d47148182226684882a0 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/29 Tested-by: build bot (Jenkins)
2011-06-12log ec data with DEBUG_SPEWSven Schnelle
Change-Id: I26424e80c776bfc134528f42e87fde42d6a13108 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/28 Tested-by: build bot (Jenkins)
2011-06-10Add ACPI automatic PIC/APIC interrupt routing logic for ck804Jonathan A. Kollasch
Change-Id: I2d462ca1220ea31af243c7a58a1dc33c39e9c840 Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/13 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-06-09H8 EC: add volume CMOS settingSven Schnelle
Change-Id: I5332c8fa52556db34dfb5e772bf544f0323e823d Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/12 Tested-by: build bot (Jenkins)
2011-06-09Revert changes to set the sb800 to AHCI mode.Marc Jones
Seabios doesn't have this support included yet, which causes the generic Persimmon and other CIMx sb800 platforms to not boot. Change-Id: If07328b7c62d7fc314647adce8fab983ed327854 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: http://review.coreboot.org/14 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2011-06-07T60/PMH7: move 'touchpad' option to pmh7Sven Schnelle
This option is PMH7 specific, and should be moved there, so all Notebook utilizing a PMH7 have this option. For Thinkpads without Touchpad (like the X60), simply don't add 'touchpad' to cmos.layout. Change-Id: Icdd0093670d565f1b16e2483aa286f4d63ccc52a Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/6 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-06-07i82801gx: enable ACPI during S3 resumeSven Schnelle
disabling ACPI during S3 wakeup breaks ACPI wakeup, as the Host OS is assuming that ACPI is enabled. Change-Id: I8ced72c4b553d41a57f26d64998118e8a77621f8 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/7 Tested-by: build bot (Jenkins)
2011-06-07SMM: add defines for APM_CNT registerSven Schnelle
in the current code, the defines for the APM_CNT (0xb2) register are duplicated in almost every place where it is used. define those values in cpu/x86/smm.h, and only include this file. And while at it, fixup whitespace. Change-Id: Iae712aff53322acd51e89986c2abf4c794e25484 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/4 Tested-by: build bot (Jenkins)
2011-06-07T60: fix touchpad optionSven Schnelle
Code used 'int' as return type, but the cmos option is only one bit. get_option returned with the value in bit 0-7, but all remaining bits were left unitialized by get_option(). fix this by using char as type. Change-Id: I60e609164277380f936f66c99ef9508fa6a6b67c Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/5 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-06-07re-indent, so files conform to coding guidelines.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Change-Id: If840164fa0e2b6349ba920edf06386ba1fe08aab Reviewed-on: http://review.coreboot.org/8 Tested-by: build bot (Jenkins) Reviewed-by: Cristian Măgherușan-Stanciu <cristi.magherusan@gmail.com>
2011-06-06SMM: add mainboard_apm_cnt() callbackSven Schnelle
motherboards can use this hook to get notified if someone writes to the APM_CNT port (0xb2). If the hook returns 1, the chipset specific hook is also skipped. Change-Id: I05f1a27cebf9d25db8064f2adfd2a0f5759e48b5 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/3 Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Tested-by: build bot (Jenkins)
2011-06-04WARNINGS_ARE_ERRORS is y per default, don't set it twice.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6637 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6594 to e350m1: Cosmetic cleanupPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Marshall Buschman <mbuschman@lucidmachines.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6636 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6593 to e350m1: Remove unused Kconfig optionsPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Marshall Buschman <mbuschman@lucidmachines.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6635 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6592 to e350m1: Update GPP port configurationPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Marshall Buschman <mbuschman@lucidmachines.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6634 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6591 to e350m1: ROM cache earlyMarshall Buschman
Enable rom cache early to reduce boot time. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6633 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6590 to e350m1: Work around memory allocation problemMarshall Buschman
Fix memory allocation problem in amdInitLate. Disabled until further debug. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6632 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6589 to e350m1: Strip down AGESA optionsMarshall Buschman
Remove some non-essential agesa options to reduce boot time. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6631 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6588 to e350m1: VGA framebufferMarshall Buschman
Declare legacy video frame buffer so that Windows generic VGA driver will work. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6630 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6587 to e350m1: RTC is not PIIX4 compatibleMarshall Buschman
Declare RTC as not PIIX4 compatible to match AMD hardware. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6629 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6586 to e350m1: FADT revisionMarshall Buschman
Make fadt revision match its length. Solves Windows 7 checked build assert. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6628 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6584 and r6601 to e350m1: SPI prefetch earlyMarshall Buschman
Enable SPI cacheline prefetch early to reduce boot time. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6627 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6583 to e350m1: pstate 0 earlyMarshall Buschman
Switch processor cores to pstate 0 early to reduce boot time. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6626 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6582 to e350m1: 33 MHz SPI read earlyMarshall Buschman
Enable 33 MHz fast mode SPI read early to reduce boot time. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6625 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6578 and r6596 to e350m1: MMCONF basePeter Stuge
Remove multiple mmconf settings and just use kconfig setting. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6624 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6574 to e350m1: MMCONF sizeMarshall Buschman
Size mmconf according to CONFIG_MMCONF_BUS_NUMBER. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6623 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6573 to e350m1: VGA, PCI MMIO and SB800 legacyMarshall Buschman
1) Use D18F1xF4 VGA Enable to simplify legacy video I/O support. 2) Extend PCI MMIO limit from dfffffff to fecfffff. 3) Add AMD recommended non-posted mapping for SB800 legacy devices. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6622 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6572 to e350m1: I/O APIC IDMarshall Buschman
1) Set I/O APIC ID according to BKDG recommendation 2) Correct I/O APIC ID reported by mptable Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6621 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04vt8237r: Simplify bootblock init to work around nested if() romcc problemPeter Stuge
During the hackathon in Prague we discovered that romcc has a problem compiling the previous nested if() statements correctly. This patch makes the code a little simpler, and indeed works around the romcc issue. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6620 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-03This patch sets max freq defaults for ddr2 and ddr3for fam10.Marc Jones
Signed-off-by: Marc Jones <marcj303@gmail.com> Acked-by: Scott Duplichan <scott@notabs.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6619 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-03Correct wrong PCI ID for VIA K8M890 Chrome.Alexandru Gagniuc
With the K8T800/M800 patch from r6367 the PCI IDs for the VIA chrome were moved to pci_ids.h. The PCI ID for K8M890 chrome was copied incorrectly. (3220 instead of 3230). This patch defines the correct PCI ID for this device. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6618 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-03advansus/a785e-i mainboard enable warning as errorKerry She
Signed-off-by: Kerry She <kerry.she@amd.com> Acked-by: Kerry She <kerry.she@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6617 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-01trivial remove blanks at the end of lineKerry She
Signed-off-by: Kerry She <kerry.she@amd.com> Acked-by: Kerry She <kerry.she@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6614 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-01This patch fix a AMD sb800 wrapper compile warning:Kerry She
src/southbridge/amd/cimx_wrapper/sb800/late call clear_ioapic but not include the prototype declare header file. Signed-off-by: Kerry She <kerry.she@amd.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6613 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-23We don't have pausing versions of single-IO instructions.Stefan Reinauer
Hence remove the wrong comment. Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6612 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-23AP_IN_SIPI_WAIT is already defined in the CPU Kconfig of those boards.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6611 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-23Correct implementation of r6608.Jonathan Kollasch
(.align actually takes its argument in bytes) Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net> Acked-by: Jonathan Kollasch <jakllsch@kollasch.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6610 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-22Ensure ck804 romstrap is 16-byte aligned.Jonathan Kollasch
This alignment seems to be necessary for the chip to recognize it. Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net> Acked-by: Jonathan Kollasch <jakllsch@kollasch.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6608 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-20Correct amd persimmon romstage code for early SPI prefetch enable.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Scott Duplichan <scott@notabs.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6601 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-20Move the ACPI FACP table to the front of the RSDT list. This is done to work ↵Scott Duplichan
around a Windows XP or Server 2003 setup failure where an error message such as: "An unexpected error (805262864) occurred at line 1768 of d:\xpclient\base\boot\setup\arcdisp.c" occurs. This change updates AMD reference board projects, but could applied to others as well. Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6600 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-16cimx_wrapper/sb800: Fix indent in late.c:sb800_enable()Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6597 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Remove multiple mmconf settings and just use kconfig setting.Marc Jones
Signed-off-by: Marc Jones <marcj303@gmail.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6596 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15agesa_wrapper: Avoid repetitive Kconfig depends, trivialPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6595 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Cosmetic cleanup.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6594 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-151) Remove unused kconfig options.Scott Duplichan
2) Correct UMA graphics PCI device ID. Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6593 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Update gpp port configuration.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6592 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Enable rom cache early to reduce boot time.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6591 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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