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AgeCommit message (Expand)Author
2014-05-13southbridge/amd/sb?00/lpc.c: Move i8254/i8259 down in southbridgeEdward O'Callaghan
2014-05-12Rambi: Enable 32k SUSCLK signalKyösti Mälkki
2014-05-12rambi: Make eMMC CLK pull-down and change pull strengths to 20KShawn Nematbakhsh
2014-05-12baytrail: align with intel recommendationsAaron Durbin
2014-05-12rambi: specify reference code index in vboot areaAaron Durbin
2014-05-12baytrail: add way to load reference code from vboot areaAaron Durbin
2014-05-12baytrail: Expose IOSF as ACPI objectDuncan Laurie
2014-05-12rambi: Disable HSUART2 and SPI interfacesDuncan Laurie
2014-05-12rambi: Enable SCC devices in ACPI modeDuncan Laurie
2014-05-12baytrail: Put devices in ACPI mode after setupDuncan Laurie
2014-05-12baytrail: Add header include wrapper and offset defineDuncan Laurie
2014-05-12superio/ite/it8718f: Remove hard coding from romstageEdward O'Callaghan
2014-05-11superio/ite/*: Factor out generic romstage componentEdward O'Callaghan
2014-05-11superio/ite/it8728f: RAMstage PNP configuration componentEdward O'Callaghan
2014-05-11SeaBIOS: Fix cpp usePatrick Georgi
2014-05-10Arch-level Kconfig menu cleanupFurquan Shaikh
2014-05-10Replace SERIAL_CPU_INIT with PARALLEL_CPU_INITKyösti Mälkki
2014-05-10mainboard/jetway/nf81-t56n-lf: Toggle WDT and CIR in devicetree.cbEdward O'Callaghan
2014-05-10superio/fintek/f71869ad: Fix incorrect LDN'sEdward O'Callaghan
2014-05-10baytrail: cache reference code for S3 resumeAaron Durbin
2014-05-10baytrail: allow ramstage_cache_location() usage in ramstageAaron Durbin
2014-05-10ramstage_cache: allow ramstage usage add valid helperAaron Durbin
2014-05-10baytrail: note S3 resume status earlierAaron Durbin
2014-05-10baytrail: utilize reg_script_run_on_dev()Aaron Durbin
2014-05-10baytrail: initialize perf/power registersAaron Durbin
2014-05-10baytrail: add more iosf access functionsAaron Durbin
2014-05-10baytrail: remove verbosity in iosfAaron Durbin
2014-05-10reg_script: add reg_script_run_on_dev()Aaron Durbin
2014-05-10baytrail: Add support for LPSS and SCC devices in ACPI modeDuncan Laurie
2014-05-09cougar_canyon2: Switch CPU/NB/SB to the shared FSP codeMartin Roth
2014-05-09Intel FSP: add a shared set of functions for the FSPMartin Roth
2014-05-09superio/serverengines/pilot: Avoid .c includesEdward O'Callaghan
2014-05-09Squelch some warnings from KconfigKyösti Mälkki
2014-05-09rambi: Enable DPTFDuncan Laurie
2014-05-09baytrail: Basic DPTF frameworkDuncan Laurie
2014-05-09rambi: Set panel power timingsDuncan Laurie
2014-05-09baytrail: Enable panel and set timingsDuncan Laurie
2014-05-09rambi: change SD card pulls to 20KAaron Durbin
2014-05-09rambi: limit SD card controller to 2.0 specAaron Durbin
2014-05-09baytrail: allow SD card controller capabilities overridesAaron Durbin
2014-05-09baytrail: fix nvs offsetsAaron Durbin
2014-05-09rambi: export SPI write-protect GPIO correctlyAaron Durbin
2014-05-09baytrail: lpe audio device needs memory for its firmwareAaron Durbin
2014-05-08ChromeOS boards: Always build code for bootmode strapsKyösti Mälkki
2014-05-08ChromeOS boards: Fix includesKyösti Mälkki
2014-05-08Declare get_write_protect_state() without ChromeOSKyösti Mälkki
2014-05-08Rename from save_chromeos_gpios() to init_bootmode_straps()Kyösti Mälkki
2014-05-08ChromeOS boards: Use explicit include of chromeos.cKyösti Mälkki
2014-05-08superio/fintek/f71869ad: Make hwm devicetree configurableEdward O'Callaghan
2014-05-08superio/fintek/f71869ad: Configure multi-func reg in devicetreeEdward O'Callaghan
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