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AgeCommit message (Expand)Author
2014-12-19fsp_baytrail: Remove GPIO_NC1 #defineMartin Roth
2014-12-19baytrail SOCs: Add missing comma in gpio.hMartin Roth
2014-12-18amd/olivehillplus/romstage.c: remove not useful variable 'halt'WANG Siyuan
2014-12-18i82371eb & qemu: Move to per-device ACPI.Vladimir Serbinenko
2014-12-18Drop VIA Epia-NStefan Reinauer
2014-12-18Drop VIA Epia-M series of boardsStefan Reinauer
2014-12-18Drop VIA Epia mainboardStefan Reinauer
2014-12-18Drop Intel E7520 and E7525 and related boardsStefan Reinauer
2014-12-18intel/truxton: Un-romcc-ify boardStefan Reinauer
2014-12-18AMD Trinity: Update SMU firmware from 10.9 to 10.14Zheng Bao
2014-12-17chromeos: Add empty functions when CONFIG_CHROMEOS is disabledDuncan Laurie
2014-12-17elog: Fix chromium merge issueMarc Jones
2014-12-17baytrail: initialize backlight PWM frequencyAaron Durbin
2014-12-17rambi: align gpu pipea settings with the VBIOSAaron Durbin
2014-12-17x86: Initialize SPI controller explicitly during PCH initDavid Hendricks
2014-12-17chromeos: vboot_loader: Add support for SW_WP_ENABLED flagShawn Nematbakhsh
2014-12-17nyan*: cbmem: Move the call to cbmemc_reinit.Gabe Black
2014-12-17tegra124: modify panel init sequenceKen Chang
2014-12-17nyan*: enable CLAMP_INPUTSKen Chang
2014-12-17nyan*: Add eventlog supportDavid Hendricks
2014-12-17Revert "elog: Use the RTC driver interface instead of reading CMOS directly."Marc Jones
2014-12-17lib/edid.c: Use 'hh' instead of 'h' length modifier in printkAlexandru Gagniuc
2014-12-17intel/minnowmax: Determine board type from GPIOsMartin Roth
2014-12-17fsp_baytrail: Add code to read GPIOs in romstageMartin Roth
2014-12-17southbridge/amd rs690 & rs780 spelling fixesMartin Roth
2014-12-17southbridge/amd agesa & cimx spelling fixesMartin Roth
2014-12-17southbridge/amd amd81XX, cs553X & sr5650 spelling fixesMartin Roth
2014-12-17southbridge/amd sb600, sb700 & sb900 spelling fixesMartin Roth
2014-12-17southbridge/nvidia: Spelling/comment fixMartin Roth
2014-12-17southbridge/via: Spelling fixesMartin Roth
2014-12-17southbridge/ricoh: Spelling fixesMartin Roth
2014-12-17ARM: Use LPAE for Virtual Address TranslationDaisuke Nojiri
2014-12-17spi_flash: Move (de-)assertion of /CS to single locationDavid Hendricks
2014-12-17spi_flash: Differentiate between atomic/manual sequencingDavid Hendricks
2014-12-17edid: initialize has_valid_detailed_blocks as 1Vince Hsu
2014-12-17edid: Change static variables to auto variables.Hung-Te Lin
2014-12-17southbridge/sis: Spelling/comment fixesMartin Roth
2014-12-17elog: Use the RTC driver interface instead of reading CMOS directly.Gabe Black
2014-12-17elog: Isolate some x86-ismsDavid Hendricks
2014-12-17elog: Do not attempt to init SPIDavid Hendricks
2014-12-17tegra124: change PLLD VCO calculation algorithmKen Chang
2014-12-16spi: Add support for Winbond W25Q32DWDavid Hendricks
2014-12-16spi: Make idcode debug print more usefulDavid Hendricks
2014-12-16blaze: Change samsung RAMCODE to samsung-2GB-204/samsung-4GB-204Neil Chen
2014-12-16tegra124: Allow "best" PLLD parameters for unmatched pixel clock.Hung-Te Lin
2014-12-16tegra124: Always enable DC when attaching SOR.Hung-Te Lin
2014-12-16nyan*: debug: Add sor registers dump functionJimmy Zhang
2014-12-16tegra124: clock: Enforce PLL constraints for VCO and CFJulius Werner
2014-12-16nyan*: Set SOR_NV_PDISP_SOR_DP_SPARE0 registerJimmy Zhang
2014-12-16nyan*: merge a couple of sor setting difference from kernel driverJimmy Zhang
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