summaryrefslogtreecommitdiff
path: root/src
AgeCommit message (Expand)Author
2015-07-21t132: Correct dma_busy functionTom Warren
2015-07-21t210: Add tegra_lp0_resume codeYen Lin
2015-07-21t210: Correct device MMIO rangeJimmy Zhang
2015-07-21arm64: Set LOG_LEVEL=0 for BL31 if coreboot does not use serialFurquan Shaikh
2015-07-21google/cyan: Configure EC_IN_RW signal as gpio inputHannah Williams
2015-07-21mec: Correct the access mode for short payloadsJagadish Krishnamoorthy
2015-07-21skylake: add global reset cause registers to power stateAaron Durbin
2015-07-21intel/cyan: Fix crossystem "wpsw_cur" statusHannah Williams
2015-07-21Kunimitsu: Add comment and separate routinesLee Leahy
2015-07-21Kunimitsu: Remove address from copyright noticeLee Leahy
2015-07-21skylake: take into account deep s3 in power failure checkAaron Durbin
2015-07-21skylake: read out and report full width of gen_pmcon registersAaron Durbin
2015-07-21Cyan: Tune charger current limit in performance states table.li feng
2015-07-21Glados: Update Serial IO modes in devicetreeNaveen Krishna Chatradhi
2015-07-21kunimitsu: Update Serial IO modes in devicetreeNaveen Krishna Chatradhi
2015-07-21Sklrvp: Update Serial IO modes in devicetreeNaveen Krishna Chatradhi
2015-07-21intel/skylake: support 32bit uart8250_mem driver in romstageNaveen Krishna Chatradhi
2015-07-21console: Add UART8250MEM 32bit supportNaveen Krishna Chatradhi
2015-07-21google/glados: add new boardPatrick Georgi
2015-07-21intel/common: remove printk in pre_console_init()rsatapat
2015-07-21Skylake: Initialize GPIOs for UART2rsatapat
2015-07-21Skylake: Only support UART2 as debug port, clean up the restNaveen Krishna Chatradhi
2015-07-21intel fsp: remove CHIPSET_RESERVED_MEM_BYTESAaron Durbin
2015-07-21cyan/strago: Disable wwanJagadish Krishnamoorthy
2015-07-21Braswell: Remove GOP from normal boot mode.Abhay Kumar
2015-07-21skylake: re-enable PCIe L1 sub statesAaron Durbin
2015-07-21Sklrvp: Select PCIEXP_L1_SUB_STATE config symbolNaveen Krishna Chatradhi
2015-07-21skylake: honor pcie root port settings already in chip.hAaron Durbin
2015-07-21skylake: Show SPI controller if enabled in devicetree.cbDuncan Laurie
2015-07-21cyan: Enable EC software syncRavi Sarawadi
2015-07-21Revert "northbridge/amd/pi: Add support for memory settings"Marc Jones
2015-07-21amd/hudson: Fix makefile FWM location checkMarc Jones
2015-07-21braswell: clean up \_PR entriesJagadish Krishnamoorthy
2015-07-20northbridge/amd/pi: Add support for memory settingsDave Frodin
2015-07-18amd/pi: Increase assumption for maximum CBFS file header sizePatrick Georgi
2015-07-18intel/kunimitsu: Fix Kconfig symbol typePatrick Georgi
2015-07-17soc/intel: Remove microcode terminatorsStefan Reinauer
2015-07-17intel/sklrvp: remove trailing whitespacePatrick Georgi
2015-07-17skylake: remove whitespace from ASL filesStefan Reinauer
2015-07-17mainboard/google: Add Braswell based Cyan boardLee Leahy
2015-07-17mainboard/intel: Add Skylake based Kunimitsu boardLee Leahy
2015-07-17mainboard/intel: Add Skylake based RVP3 boardLee Leahy
2015-07-17mainboard/intel: Add Braswell based Strago boardLee Leahy
2015-07-17indent style fix for lapic_cpu_init.cJonathan A. Kollasch
2015-07-17Remove unused Kconfig symbols in c codeMartin Roth
2015-07-16t210: new sdram_lp0_save_params() functionYen Lin
2015-07-16foster: correct odmdata in odmdata.cfgYen Lin
2015-07-16smaug: correct odmdata in odmdata.cfgYen Lin
2015-07-16t210: correct odmdata location in bctYen Lin
2015-07-16foster: add sdram_configs.cYen Lin
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-23 23:14:04 +0000