coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2016-05-06	intel/amenia: Declare ChromeEC in devicetree.cb	Alexandru Gagniuc
2016-05-06	intel/amenia: Check with EC if we should enter recovery mode	Alexandru Gagniuc
2016-05-06	ec/google/chromeec/ec_commands.h: Include stdint.h	Alexandru Gagniuc
2016-05-06	intel/amenia: Configure the bridge to ChromeEC in the bootblock	Alexandru Gagniuc
2016-05-06	soc/apollolake/lpc_lib: Add utility to configure LPC pads	Alexandru Gagniuc
2016-05-06	soc/apollolake/lpc: Open I/O to LPC based on resource allocation	Alexandru Gagniuc
2016-05-06	Revert "soc/intel/apollolake: Enable LPC bus interface"	Alexandru Gagniuc
2016-05-06	intel/amenia: Do not manually open up IO windows	Alexandru Gagniuc
2016-05-06	soc/intel/apollolake: fix incorrect bdsm -> tolud memory resources	Aaron Durbin
2016-05-06	soc/intel: indicate to build system that XIP_ROM_SIZE isn't used	Aaron Durbin
2016-05-06	cpu/x86: don't treat all chipsets the same regarding XIP_ROM_SIZE	Aaron Durbin
2016-05-06	{cpu,soc}/intel: remove unused smm_init() function	Aaron Durbin
2016-05-06	cpu/x86/mp_init: reduce exposure of internal implementation	Aaron Durbin
2016-05-06	soc/intel/skylake: convert to using common MP and SMM init	Aaron Durbin
2016-05-06	cpu/intel/haswell: convert to using common MP and SMM init	Aaron Durbin
2016-05-06	soc/intel/broadwell: convert to using common MP and SMM init	Aaron Durbin
2016-05-06	soc/intel/apollolake: convert to using common MP init	Aaron Durbin
2016-05-06	soc/intel/braswell: convert to using common MP and SMM init	Aaron Durbin
2016-05-06	soc/intel/fsp_broadwell_de: convert to using common MP init	Aaron Durbin
2016-05-06	soc/intel/apollolake: Correct PCI write size in romstage	Furquan Shaikh
2016-05-05	rdc/r8610: Move to src/soc	Stefan Reinauer
2016-05-05	dmp/vortex86ex: Merge northbridge and southbridge into soc	Stefan Reinauer
2016-05-05	lib/reg_script: Fix braces	Stefan Reinauer
2016-05-05	soc/intel/quark: Add script time delay support	Lee Leahy
2016-05-05	soc/intel/quark: Add temperature sensor support	Lee Leahy
2016-05-04	soc/intel/quark: Add USB PHY initialization	Lee Leahy
2016-05-04	drivers/xpowers: Switch to src/drivers/[X]/[Y]/ scheme	Stefan Reinauer
2016-05-04	soc/apollolake: Set BootMode based on previous sleep state	Ravi Sarawadi
2016-05-04	soc/apollolake/romstage: Do not cast const to non-const pointers	Alexandru Gagniuc
2016-05-04	soc/intel/common/mrc_cache: Honor MRC data as a constant pointer	Alexandru Gagniuc
2016-05-04	nb/intel/sandybridge/raminit: support calling dram_freq multiple times	Patrick Rudolph
2016-05-04	nb/intel/sandybridge/raminit: add additional fallbacks	Patrick Rudolph
2016-05-04	nb/intel/gm45: Fix native text mode initialization	Nick High
2016-05-04	lib/reg_script: Add display support	Lee Leahy
2016-05-04	soc/intel/fsp_baytrail: convert to using common MP and SMM init	Aaron Durbin
2016-05-04	soc/intel/baytrail: convert to using common MP and SMM init	Aaron Durbin
2016-05-04	cpu/x86: combine multiprocessor and SMM initialization	Aaron Durbin
2016-05-04	cpu/x86: remove BACKUP_DEFAULT_SMM_REGION option	Aaron Durbin
2016-05-04	broadwell/me: Fix out-of-bounds array access error	Evan Lojewski
2016-05-04	cpu/x86/smm_module_loader: always build with SMM module support	Aaron Durbin
2016-05-03	soc/intel/quark: Add IntelQNCConfig.h from EDK-II	Lee Leahy
2016-05-03	mainboard/intel/galileo: Enable I2C and GPIO	Lee Leahy
2016-05-03	vendorcode/intel/fsp/fsp1_1/quark: Update FspUpdVpd.h	Lee Leahy
2016-05-03	chromeos: Ensure that the last file in FW_MAIN is not also the first one	Paul Kocialkowski
2016-05-03	intel/baytrail: use fmap information for code caching	Patrick Georgi
2016-05-03	lib/cbfs: Use fmap derived information about the COREBOOT region	Patrick Georgi
2016-05-03	arch/x86: Drop CBFS_BASE_ADDRESS	Patrick Georgi
2016-05-03	southbridge/amd: Drop HUDSON_FWM_INSIDE_CBFS	Patrick Georgi
2016-05-03	build system: remove CBFSTOOL_PRE1_OPTS	Patrick Georgi
2016-05-02	soc/intel/quark: Remove UPD parameters	Lee Leahy