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2016-10-01mainboard/*/*/*/usb.asl: Use tabs for indentsElyes HAOUAS
Change-Id: Id46a0c4ca59dc7224c2eedd674ea3a5486509de1 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16824 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01mainboard/gigabyte/m57sli/romstage.c: Use tabs for indentsElyes HAOUAS
Change-Id: Ib439e5d96543790d17934bd477af62d39a5958b6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16815 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01mainboard/jetway/j7f2: Use tabs for indentsElyes HAOUAS
Change-Id: Id97981a05ce4af371c765c6950ed504557b0a584 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16825 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01mainboard/winent/mb6047: Use tabs for indentsElyes HAOUAS
Change-Id: Iaf5ad440cfc2bbe08ea9f6c545e5e314645c8893 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16823 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01mainboard/kontron/ktqm77: Use tabs for indentsElyes HAOUAS
Change-Id: I3040dc9a2534a77087805ee61c4f91d1bdb4d509 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16822 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01mainboard/digitallogic/msm800sev: Use tabs for indentsElyes HAOUAS
Change-Id: I39ad6606869f059b2ef0c45d6741b844b3791655 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16821 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01mainboard/gigabyte/ga-b75m-d3v: Use tabs for indentsElyes HAOUAS
Change-Id: I36011719f79da4a9ab2aaeb92ffb0506b4373143 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16816 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01mainboard/gigabyte/ga-b75m-d3h: Use tabs for indentsElyes HAOUAS
Change-Id: I038e5cea654d1760ddb2c403c651d8f75e021251 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16819 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01mainboard/samsung/stumpy: Use tabs for indentsElyes HAOUAS
Change-Id: I1ffee53a04df6874f658feb3d6ce7d5c7b922837 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16818 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01mainboard/kontron/986lcd-m: Use tabs for indentsElyes HAOUAS
Change-Id: Ibeb0da2f75b4aec32f5238e5634bc1f1d8220b84 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16820 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30google/reef: Fix default values in KconfigMartin Roth
These default values weren't being set with the default keyword so were ending up with different values. from the default generated config file before this change: CONFIG_DRIVER_TPM_I2C_BUS=0x9 CONFIG_DRIVER_TPM_I2C_ADDR=0x2 CONFIG_DRIVER_TPM_I2C_IRQ=-1 Change-Id: I19514d0c9b2a9b7e479f003a4d3384e073f4d531 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/16828 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-30Kconfig: Prefix hex defaults with 0xMartin Roth
Because these variables had "non-hexidecimal" defaults, they were updated by kconfig when writing defconfig files. Change-Id: Ic1a070d340708f989157ad18ddc79de7bb92d873 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/16827 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-30mainboard/google/stout/romstage.c: Use tabs for indentsElyes HAOUAS
Change-Id: I2402648b8c0b9dcc730ce7f099e1e4ccef3b79fc Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16814 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-30soc/intel/fsp_broadwell_de/uart: Drop itNico Huber
A copy of our uart8250io driver sneaked in with Broadwell-DE support. The only difference is the lack of initialization (due to FSP handling that). TEST=manually compared resulting object files Change-Id: I09be10b76c76c1306ad2c8db8fb07794dde1b0f2 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/16786 Tested-by: build bot (Jenkins) Reviewed-by: York Yang <york.yang@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-30mb/intel/d945gclf: Allow use of native graphic initArthur Heymans
Add PCI device id to native graphic init and add the Native graphic init option in Kconfig. Change-Id: I136122daef70547830bcc87f568406be7162461f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/16512 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30i945/gma.c: add native VGA initArthur Heymans
This reuses the Intel Pineview native graphic initialization to have output on the VGA connector of i945 devices. The behavior is the same as with the vendor VBIOS BLOB. It uses the external VGA display if it is connected. Change-Id: I7eaee87d16df2e5c9ebeaaff01d36ec1aa4ea495 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/16511 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30i945/gma.c: use linux code to calculate divisorsArthur Heymans
The code to compute n, m1, m2, p1 divisors is not correct in coreboot and on some targets hits a working mode at lower refresh rate, which is why display is working on some targets. The divisors must be such "refclk * (5 * (m1 + 2) + (m2 + 2))/ (n + 2) / (p1 * p2)" is as close as possible to the target frequency (which is defined by the resolution and refresh rate). This patch also fixes the reference frequency. This patch reuses linux (4.1) code from drivers/gpu/drm/i915/intel_display.c to correctly compute divisors. The result is that some previously not working displays, like many displays found on the Lenovo T60 might work now. Some examples of T60 displays that were known to not work (in payload): Samsung LTN141XA-L01 (14.1" 1024x768) LG-Philips LP150X09 (15.1" 1024x768) IDtech N150U3-L01 (15.1" 1600x1200) IDtech IAQX10N (15.1" 2048x1536) Samsung LTN154X3-L0A (15.4" 1280x800) LG-Philips LP150E06-A5K4 (15.1" 1400x1050) Tested on T60 with 1024x786. Change-Id: I2c7f3bb0024ac005029eaebe3ecdc70c38ac777e Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/16504 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30vboot: clear tpm when requiredVadim Bendebury
Function which invoked when TPM clear is requested was left empty, this patch fixes it. BRANCH=gru BUG=chrome-os-partner:57411 TEST=verified on a chromeos device that tpm is in fact cleared when CLEAR_TPM_OWNER_REQUEST is set by userland. Change-Id: I4370792afd512309ecf7f4961ed4d44a04a3e2aa Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://review.coreboot.org/16805 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
2016-09-30mainboard/intel/galileo: Make FSP 2.0 the defaultLee Leahy
Switch from FSP 1.1 to FSP 2.0 as the default build. BRANCH=none BUG=None TEST=Build and run on Galileo Gen2 Change-Id: Icbb3a36cdde68baf4d68fbfc371f8847c56e1162 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/16810 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30drivers/intel/fsp2_0: Fix debug display supportLee Leahy
Fix errors in debug display support. BRANCH=none BUG=None TEST=Build FSP 2.0 (SEC/PEI core with all FSP debug on) and run on Galileo Gen2 Change-Id: I2ece056d66dc8568a7b7206970f20368ec5bf147 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/16809 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30soc/intel/quark: Fix FSP 2.0 buildLee Leahy
Fix the build issues with FSP 2.0: * Remove struct from the various data structures. * Properly display the serial port UPDs. * Change chipset_handle_reset parameter type BRANCH=none BUG=None TEST=Build FSP 2.0 (SEC/PEI core with all FSP debug off) and run on Galileo Gen2 Change-Id: Icae578855006f18e7e5aa18d2fd196d300d0c658 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/16808 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30soc/intel/quark: Support multiple version of FSPLee Leahy
Add support for multiple versions of FSP. BRANCH=none BUG=None TEST=Build FSP 1.1 (SEC/PEI core, with all FSP debug off) and run on Galileo Gen2 Change-Id: Ie7e7f0f883c4d3bfcb18fa25571e505cdde00b2d Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/16807 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30mainboard/intel/quark: Add FSP selection valuesLee Leahy
Add Kconfig values to select the FSP setup: * FSP version: 1.1 or 2.0 * Implementation: Subroutine or SEC/PEI core based * Build type: DEBUG or RELEASE * Enable all debugging for FSP * Remove USE_FSP1_1 and USE_FSP2_0 Look for include files in vendorcode/intel/fsp/fsp???/quark BRANCH=none BUG=None TEST=Build FSP 1.1 (subroutine) and run on Galileo Gen2 Change-Id: I3a6cb571021611820263a8cbfe83e69278f50a21 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/16806 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-29mainboard/asus/kfsn4-dre_k8/romstage.c: Use tabs for indentsElyes HAOUAS
Change-Id: If6b36ebef49dd2733d272f990bb7c6623d4ab1b1 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16785 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-29mainboard/via/epia-m850/romstage.c: Remove unnecessary whitespaceElyes HAOUAS
Change-Id: Ic5359f794c64a9a67ec9e059af337a65073baff4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16784 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: Martin Roth <martinroth@google.com>
2016-09-29mainboard/lanner/em8510: Use tabs for indentsElyes HAOUAS
Change-Id: Ib6191c590144438d7d9d6772d792a83e92d5516a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16783 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-29mainboard/iwill/dk8_htx: Use tabs for indentsElyes HAOUAS
Change-Id: I303270a45171dda88b7661e3797fd3724e3b055f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16782 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-29mainboard/gigabyte/ga_2761gxdk: Use tabs for indentsElyes HAOUAS
Change-Id: Ie752fe0a74acd4b79711596e56fc5ebf83884a0d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16779 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-29mainboard/elmex: Add new board pcm205401Yuichi Ito
pcm205401 is CPU board equipped with T40R of AMD. We used SeaBIOS and Windows Embedded Standard 7 to test pcm205401. In comparison to pcm205400, only VGA PCI ID is changed and board identifier strings in SMBIOS / DMI. Change-Id: I6c7e90db84f13ffbf9e629f2b92649895a466155 Signed-off-by: Yuichi Ito <yui.corebt@gmail.com> Reviewed-on: https://review.coreboot.org/15930 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-09-29mainboard/elmex: Add new board pcm205400Yuichi Ito
pcm205400 is CPU board equipped with T56N of AMD. We used SeaBIOS and Windows Embedded Standard 7 to test pcm205400. I disable the port5, 6, and 7 of the PCI-e in elmex/pcm205400/PlatformGnbPcieComplex.h. I disable the audio capabilities at the 236th line of elmex/pcm205400/platform_cfg.h. Coding style is modified to avoid the error and warning that occur when I commit. Change-Id: I77cb76903fe3c1b500a306426f5399936382695b Signed-off-by: Yuichi Ito <yui.corebt@gmail.com> Reviewed-on: https://review.coreboot.org/15929 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-09-29src/mainboard: Add vendor ELMEX with a boardYuichi Ito
Add board with amd/persimmon as template. Change-Id: I263b54e0f49b6f1ba730c7f87de41f990ba8fe67 Signed-off-by: Yuichi Ito <yui.corebt@gmail.com> Reviewed-on: https://review.coreboot.org/15926 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-09-28google/reef: Mark touchpad and touchscreen as probed devicesDuncan Laurie
Add the 'probed' flag to the touchpad and touchscreen devices so they are probed by the kernel before being loaded, in case they do not exist or are replaced with another vendor. BUG=chrome-os-partner:57686 Change-Id: I0a61964e6874cd99fab0c21fa404a43548fc8ab5 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/16743 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-09-28drivers/i2c/generic: Add config for marking device as probedDuncan Laurie
Add a config option to the generic I2C device driver to indicate to the OS that this device should be probed before being added. This can be used to provide ACPI device instantiations to devices that may not actually exist on the board. For example, if multiple trackpad vendors are supported on the same board they can both be described in ACPI and the OS will probe the address and load the driver only if the device responds to the probe at that address. BUG=chrome-os-partner:57686 Change-Id: I22cffb4b15f25d97dfd37dc58bca315f57bafc59 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/16742 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-09-28mainboard/amd/rumba: Use tabs for indentsElyes HAOUAS
Change-Id: I005e607faa2a6c527584ba9cdcad92f4517a15e6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16778 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-28mainboard/supermicro/h8dmr/romstage.c: Use tabs for indentsElyes HAOUAS
Change-Id: I008ccc5fa9d96e52ee59a4562d81e4f7c1d1a6ac Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16775 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-28mainboard/sunw/ultra40/romstage.c: Use tabs for indentsElyes HAOUAS
Change-Id: I9b7be74625dfcb6317a1cdb61d0dc77d7f359462 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16776 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-28mainboard/technexion/tim5690: Use tabs for indentsElyes HAOUAS
Change-Id: Icd1f145b3575c6d95dacceb9c0426fbdedcdd686 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16777 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-28mainboard/supermicro/h8qme_fam10/romstage.c: Use tabs for indentsElyes HAOUAS
Change-Id: I6ca564294ff3d8eaeae21c0e2c008401aa3f32ff Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16774 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-28mainboard/asus/dsbf/romstage.c: Use tabs for indentsElyes HAOUAS
Change-Id: I74d4ef76b8166c8567b1b855c6bc963b4312df77 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16773 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2016-09-28mainboard/intel/emeraldlake2/gpio.c: Use tabs for indentsElyes HAOUAS
Change-Id: I369c2063a5e57d1fd33d3c6bf7c715c22970fc32 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16772 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-28mainboard/intel/eagleheights/debug.c: Use tabs for indentsElyes HAOUAS
Change-Id: I4d2d876d48e018c247e7f365f7c237a4d8ced332 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16771 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-28mainboard/broadcom/blast: Use tabs for indentsElyes HAOUAS
Change-Id: I61bef70ec572c12518cd3763a6a860e56bfdb716 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16745 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-28soc/intel/apollolake: Add pmc_ipc device supportLijian Zhao
A dedicated pmc_ipc DSDT entry is required for pmc_ipc kernel driver. The ACPI mode entry includes resources for PMC_IPC1, SRAM, ACPI IO and Punit Mailbox. BRANCH=None BUG=chrome-os-partner:57364 TEST=Boot up into OS successfully and check with dmesg to see the driver has been loaded successfully without errors. Change-Id: I3f60999ab90962c4ea0a444812e4a7dcce1da5b6 Signed-off-by: Zhao, Lijian <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/16649 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-09-28soc/intel/apollolake: Use fixed resource for SRAM and IPC1Lijian Zhao
Intel telemetry support will require PMC IPC1 and SRAM devices to be operated in ACPI mode. Then using fixed resources on BAR0, BAR1 and BAR2 (PMC only) for those two devices will help the resource assignment in DSDT stage. BUG=chrome-os-partner:57364 BRANCH=None TEST=Boot up into Chrome OS successfully and check with dmesg to see the driver has been loaded successfully without errors. Change-Id: I8f0983a90728b9148a124ae3443ec29cd7b344ce Signed-off-by: Zhao, Lijian <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/16648 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-09-27northbridge/sandybridge/raminit_mrc.c: fix missing includeMatt DeVillier
Compilation (w/o native raminit) fails due to missing include Change-Id: Ic79a77006257b32e0181c88c4e24d7c1f5c5f7ce Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/16735 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-27mainboard/msi/ms9185/resourcemap.c: Use tabs for indentsElyes HAOUAS
Change-Id: I30b5830442da65ae3ddd35e8bca67795c34e9020 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16737 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-27mainboard/msi/ms9185/romstage: Use tabs for indentsElyes HAOUAS
Change-Id: I101462105da31654032ac7e6abd3f9423ad7a7ef Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16736 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-27x86: acpi: Use GOOG ID for coreboot tableDuncan Laurie
Use the GOOG ACPI ID until there is an official ID allocation for coreboot. Since I administer this range I allocated 0xCB00-0xCBFF for coreboot use. Change-Id: I38ac0a0267e21f7282c89ef19e8bb72339f13846 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/16724 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-27mainboard/msi/ms9185/mb_sysconf.h: Use tabs for indentsElyes HAOUAS
Change-Id: Ib2ab95b26c3bb1cbd58aafb1fafd1b285d6a5ba8 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16738 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-27i945/gma.c: Generate fake VBTArthur Heymans
This generates a fake VBT for the Intel i945 graphic device. i945 supports both the mobile chipset 945gm (calistoga) and the desktop chipset 945gc (lakeport), which is why a VBT with a different id string needs to be created for each target. The VBT id string is obtained from the vbios blob in the following way: "strings vbios.bin | grep VBT". Change-Id: I8245b12b16a4426efbe1f584d4163fc257231a98 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/16530 Tested-by: build bot (Jenkins) Reviewed-by: Damien Zammit <damien@zamaudio.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-13 21:34:51 +0000