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AgeCommit message (Expand)Author
2013-03-18haswell: lapic timer supportAaron Durbin
2013-03-18lynxpoint: Move a bit of generic RCBA into early_pchDuncan Laurie
2013-03-18lib: add rmodule supportAaron Durbin
2013-03-18haswell: fix ACPI MCFG tableAaron Durbin
2013-03-18haswell: enable caching before SMM initializationAaron Durbin
2013-03-18haswell: Clear correct number of MCA banksAaron Durbin
2013-03-18haswell: move definition of CORE_THREAD_COUNT_MSRAaron Durbin
2013-03-18haswell: Use SMM ModulesAaron Durbin
2013-03-18Add support for "Stout" ChromebookStefan Reinauer
2013-03-18Add Intel Whitetip Mountain 2 mainboardDuncan Laurie
2013-03-17Intel HD Audio: clean up initialization codeStefan Reinauer
2013-03-17x86 intel: Add Firmware Interface Table supportAaron Durbin
2013-03-17haswell platforms: restructure romstage mainAaron Durbin
2013-03-17Add Intel Whitetip Mountain 1 mainboardDuncan Laurie
2013-03-17bd82x6x: Add config option to force SATA link to different speeds.Shawn Nematbakhsh
2013-03-17Pantherpoint: Add XHCI device initDuncan Laurie
2013-03-17bd82x6x: don't use absolute symbolsAaron Durbin
2013-03-17Add bd82x6x XHCI(USB3) S3/S4 workaroundMarc Jones
2013-03-17Add bd82x6x PCH functions to SMMMarc Jones
2013-03-17haswell: include TSEG region in cacheable memoryAaron Durbin
2013-03-17i945: Replace some two magic values by defined namesPatrick Georgi
2013-03-17ASROCK Fam14 DSDT: Add secondary bus range to PCI0Mike Loptien
2013-03-17AMD Fam14 DSDT: Remove INI method from AZHD deviceMike Loptien
2013-03-17ASROCK Fam14 DSDT: Remove INI method from AZHD deviceMike Loptien
2013-03-17Lippert Fam14 DSDT: Remove INI method from AZHD deviceMike Loptien
2013-03-17Lippert Fam14 DSDT: Add secondary bus range to PCI0Mike Loptien
2013-03-17AMD Fam14 DSDT: Add OSC methodMike Loptien
2013-03-17ASROCK Fam14 DSDT: Add OSC methodMike Loptien
2013-03-17Lippert Fam14 DSDT: Add OSC methodMike Loptien
2013-03-17lynxpoint: Add support for disabling ULT devicesDuncan Laurie
2013-03-16stddef.h: Add standard defines for KiB, MiB, GiB, and TiBRonald G. Minnich
2013-03-16haswell: don't add a 0-sized memory range resourceAaron Durbin
2013-03-16google/snow: rename a file so that it is clear what board it is forRonald G. Minnich
2013-03-15Google Link: Add remaining code to support native graphicsRonald G. Minnich
2013-03-15AMD Fam14 DSDT: Add secondary bus range to PCI0Mike Loptien
2013-03-15Super I/O W83627DHG: Enable UART B by redirecting pinsWolfgang Kamp
2013-03-15Persimmon DSDT: Remove INI method from AZHD deviceMike Loptien
2013-03-15Persimmon DSDT: Add OSC methodMike Loptien
2013-03-15Drop CHIP_NAME from intel/baskingridgeStefan Reinauer
2013-03-15haswell: Fix BDSM and BGSM indicies in memory mapAaron Durbin
2013-03-15haswell: reserve default SMRAM spaceAaron Durbin
2013-03-15haswell: resource allocationAaron Durbin
2013-03-14lynxpoint: lpc resource reservationsAaron Durbin
2013-03-14haswell: more ULT/LP support and minor tweaksDuncan Laurie
2013-03-14baskingridge: Report static temperature in _TMPDuncan Laurie
2013-03-14haswell: remove CONFIG_GFXUMAAaron Durbin
2013-03-14x86: improve lb_cleanup_memory_rangesAaron Durbin
2013-03-14baskingridge: dev, recovery, and WP switch supportAaron Durbin
2013-03-14baskingridge: update gpio map documentationAaron Durbin
2013-03-14haswell: Add VGA PCI ID mappingsAaron Durbin
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