coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2016-07-28	intel/apollolake: Update gnvs for dptf	Shaunak Saha
2016-07-28	intel/apollolake: Add soc specific DPTF values	Shaunak Saha
2016-07-28	intel/common: Add ASL code for DPTF	Shaunak Saha
2016-07-28	intel/common/opregion.c: only write 16 bytes to 16 byte field	Martin Roth
2016-07-28	arch/riscv: Refactor bootblock.S	Jonathan Neuschäfer
2016-07-28	arch/riscv: Only initialize virtual memory if it's available	Jonathan Neuschäfer
2016-07-28	arch/riscv: Remove spinlock code from atomic.h	Jonathan Neuschäfer
2016-07-28	intel/fsp1_1: Add C entry support to locate FSP Temp RAM Init	Subrata Banik
2016-07-28	skylake/devicetree: Add LPC EC decode range	Subrata Banik
2016-07-28	skylake/mainboard: Define mainboard hook in bootblock	Subrata Banik
2016-07-28	soc/intel/skylake: Add C entry bootblock support	Subrata Banik
2016-07-28	soc/intel/skylake: Do cache as ram and prepare for C entry	Subrata Banik
2016-07-28	soc/intel/skylake: Use init_vbnv_cmos from vboot vbnv	Furquan Shaikh
2016-07-28	soc/intel/broadwell: Use init_vbnv_cmos from vboot vbnv	Furquan Shaikh
2016-07-28	chromeos/gnvs: Clean up use of vboot handoff	Furquan Shaikh
2016-07-28	chromeos: Clean up elog handling	Furquan Shaikh
2016-07-28	google/urara: Provide dummy implementations of rec/dev functions	Furquan Shaikh
2016-07-28	qualcomm/gale: Add required files to enable elog in ramstage	Furquan Shaikh
2016-07-28	qualcomm/storm: Add required files to enable elog in ramstage	Furquan Shaikh
2016-07-28	i2c/ww_ring: Add ww_ring files to ramstage	Furquan Shaikh
2016-07-28	google/chromeos: Use vboot bootmode functions for elog add boot reason	Furquan Shaikh
2016-07-28	bootmode: Get rid of CONFIG_BOOTMODE_STRAPS	Furquan Shaikh
2016-07-28	vboot: Separate vboot from chromeos	Furquan Shaikh
2016-07-27	drivers/intel/fsp2_0: Update MRC cache with dead version in recovery	Furquan Shaikh
2016-07-27	soc/intel/common: Store MRC data in next available slot in the cache	Furquan Shaikh
2016-07-27	mainboard/google/slippy: remove unobtainable mainboard	Aaron Durbin
2016-07-27	mainboard/google/bolt: remove unobtainable mainboard	Aaron Durbin
2016-07-27	soc/intel/apollolake: Disable monitor mwait	Bora Guvendik
2016-07-27	Rename VB_SOURCE to VBOOT_SOURCE for increased clarity	Paul Kocialkowski
2016-07-27	chromeec: Use CHROMEEC_SOURCE with fallback instead of hardcoding path	Paul Kocialkowski
2016-07-27	arch/x86: Add bootblock and postcar support for SOC MTRR access	Lee Leahy
2016-07-27	cpu/x86: Support CPUs without rdmsr/wrmsr instructions	Lee Leahy
2016-07-27	nb/intel/x4x: Fix CAS latency detection and max memory detection	Damien Zammit
2016-07-27	device: include devicetree in bootblock stage	Aaron Durbin
2016-07-27	soc/nvidia/tegra124: remove cache_policiy option	Aaron Durbin
2016-07-26	drivers/intel/fsp2_0/header_util: Convert UPD headers	Lee Leahy
2016-07-26	google/oak: dsi: set mipi pin driving control on	Martin Roth
2016-07-26	meditek/mt8173: dsi: set mipi pin driving control on	Jitao Shi
2016-07-26	arch/x86: Generate a map file for the postcar stage	Lee Leahy
2016-07-26	arch/x86: Organize ramstage to match other stages	Lee Leahy
2016-07-26	arch/x86: Move romstage files into romstage section	Lee Leahy
2016-07-26	arch/x86: Move postcar stage commands into place	Lee Leahy
2016-07-26	drivers/elog: put back 4KiB limit	Aaron Durbin
2016-07-26	intel car: Use MTRR WRPROT type for XIP cache	Kyösti Mälkki
2016-07-26	intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE	Kyösti Mälkki
2016-07-26	lib: Don't require ULZMA compression for postcar	Lee Leahy
2016-07-26	drivers/intel/fsp2_0: Enable XIP romstage with loaded FSP-M	Lee Leahy
2016-07-26	src/lib: Enable display of cbmem during romstage and postcar	Lee Leahy
2016-07-25	drivers/uart: Enable debug serial output during postcar	Lee Leahy
2016-07-25	intel/skylake: Select VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT	Furquan Shaikh