coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2017-10-18	soc/intel/cannonlake: Update PCIE CLKREQ programing	Lijian Zhao
2017-10-18	soc/intel/cannonlake: Add finalize function	Lijian Zhao
2017-10-18	google/snappy: Override USB2 strength by SKUID	Kevin Chiu
2017-10-18	mb/google/fizz: skip reading SPD data when DUT resumes from S3	Gaggery Tsai
2017-10-18	soc/intel/cannonlake: Calculate soc reserved memory size	Subrata Banik
2017-10-18	soc/intel/cannonlake: Use EBDA area to store cbmem_top address	Subrata Banik
2017-10-18	soc/intel/cannonlake: Refactor memory layout calculation	Subrata Banik
2017-10-18	soc/intel/cannonlake: Create acpi_get_sleep_type() to get previous sleep state	Subrata Banik
2017-10-18	google/chromeec: Drain all MKBP events while clearing host events	Furquan Shaikh
2017-10-18	google/chromeec: Add new helper function to read MKBP events	Furquan Shaikh
2017-10-17	intel/cannonlake_rvp: enable HS400	Bora Guvendik
2017-10-17	soc/amd/stoneyridge: clean up chip.h	Martin Roth
2017-10-17	soc/intel/common/block/pmc: Move pmc_disable_all_gpe to romstage	Furquan Shaikh
2017-10-17	amd/agesa: Remove redundant UDELAY_LAPIC selection	Paul Menzel
2017-10-16	sandybridge/acpi: remove unnessary check of PCI IDs	Vagiz Trakhanov
2017-10-16	nb/intel: Add Ivy Bridge Server (Xeon-E3v2) PCI IDs	Vagiz Trakhanov
2017-10-16	arch/x86: initialize EBDA in S3 and S0/S5 path	Aaron Durbin
2017-10-16	soc/intel/common: sanity check ebda signature	Aaron Durbin
2017-10-16	drivers/elog: Fix debug build errors	John E. Kabat Jr
2017-10-16	intel/cannonlake_rvp: Modify memory parameters to support LP4 board	Lijian Zhao
2017-10-16	cpu/amd: Fix spelling of implementation	Paul Menzel
2017-10-16	cpu/x86/mtrr: Remove var-MTRR alignment optimization	Nico Huber
2017-10-16	google/reef: Add more special cases for coral nasher	Patrick Georgi
2017-10-16	src/mainboard/google/kahlee: Remove legacy tables	Richard Spiegel
2017-10-16	console/flashconsole: Enable support for postcar	Youness Alaoui
2017-10-16	mb/google/fizz: enable AER for PCIe root ports	Kane Chen
2017-10-16	src/soc/skylake: Fix Null pointer dereferences	Shaunak Saha
2017-10-16	intel/common: CAR setup CQOS	Naresh G Solanki
2017-10-16	soc/amd/common: Clean up file includes	Frank Vibrans
2017-10-16	mainboard/pcengines/apu2: use GENERIC_SPD_BIN	Kamil Wcislo
2017-10-16	soc/amd/stoneyridge: Check UART index	Marshall Dawson
2017-10-16	drivers/uart8250mem: Check for zero base address	Marshall Dawson
2017-10-16	soc/amd/stoneyridge: Update AMD firmware placement options	Martin Roth
2017-10-16	src/mainboard/kahlee: Default AMD FW position to 1MB	Martin Roth
2017-10-16	arch/x86/gdt: Correct format of multi-line comment	Paul Menzel
2017-10-15	amd/inagua: Drop unused Broadcom 5785 support code	Kyösti Mälkki
2017-10-15	amd/stoneyridge: Add function to find PmControl register	Marshall Dawson
2017-10-15	google/kahlee: Add SMI sleep handler	Marshall Dawson
2017-10-15	google/kahlee: Add SMI apmc handler	Marshall Dawson
2017-10-15	amd/soc/common: Print an error if an AGESA callout isn't supported	Marc Jones
2017-10-15	google/wizpig: add new board as variant of cyan baseboard	Matt DeVillier
2017-10-15	google/ultima: add new board as variant of cyan baseboard	Matt DeVillier
2017-10-15	google/setzer: add new board as variant of cyan baseboard	Matt DeVillier
2017-10-15	soc/amd/stoneyridge/lpc.c: Refactor lpc_enable_childrens_resources	Richard Spiegel
2017-10-15	pcengines boards: Update board_info files	Michał Żygowski
2017-10-14	biostar/a68n_5200: Fix hang with board due to SPI	Damien Zammit
2017-10-14	biostar/a68n_5200: Do actual port	Damien Zammit
2017-10-14	biostar/a68n_5200: Clone amd/olivehill	Damien Zammit
2017-10-14	intel/skylake: Use Sata related registers from devicetree	Youness Alaoui
2017-10-13	google/kahlee: Add AGESA_DO_RESET in bootblock	Marc Jones