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AgeCommit message (Expand)Author
2020-10-17vendorcode/amd: Fix typo in *is defined* in commentsPaul Menzel
2020-10-17AGESA mb: Replace tab with space in macro definition for consistencyPaul Menzel
2020-10-17vc/amd/Kconfig: Add missing dot in AMD domain www.amd.comPaul Menzel
2020-10-17superio/nuvoton: Only set bit 7 of global CR 0x2a for COM APaul Menzel
2020-10-17intel/txt: Add `txt_get_chipset_dpr` functionAngel Pons
2020-10-17security/intel/txt: Improve MTRR setup for GETSEC[ENTERACCS]Angel Pons
2020-10-17sec/intel/txt: Bail if var MTRRs cannot snugly cache the BIOS ACMAngel Pons
2020-10-17trogdor/sc7180: Clarify USE_QC_BLOBS requirementsJulius Werner
2020-10-16include/cpu/x86: introduce new helper for (un)setting MSRsMichael Niewöhner
2020-10-16soc/intel/skylake: Rename PcieRpAspm devicetree configBenjamin Doron
2020-10-16acpi/acpigen_dsm: fix I2C HID DSM to report correct function supportJosie Nordrum
2020-10-16mb/google/zork: disable eMMC per FW_CONFIG for berknipKevin Chiu
2020-10-16mb/intel/adlrvp: Enable Hybrid storage modeSubrata Banik
2020-10-16mb/intel/adlrvp: Enable PCIE RP11 for optaneSubrata Banik
2020-10-16mb/intel/adlrvp: Fix SSD detection issue on ADL RVPSubrata Banik
2020-10-16mb/intel/adlrvp: Program GPIO for M.2 PCH SSDSubrata Banik
2020-10-15lib and libpayload: Add popcnt functionsAngel Pons
2020-10-15soc/intel/xeon_sp: Add get_system_memory_map()Marc Jones
2020-10-15ec/google/chromeec: Update ec_commands.hYidi Lin
2020-10-15Update bit field helpers to support more bit field operateHuayang Duan
2020-10-15sec/intel/txt/getsec_enteraccs.S: Save and restore MTRR_DEF_TYPEArthur Heymans
2020-10-15nb/intel/haswell: Account for DPR region in memory mapAngel Pons
2020-10-15security/intel/txt: Use `smm_region()` to get TSEG baseAngel Pons
2020-10-15soc/intel/skylake: Configure L1 substates for PCH root portsBenjamin Doron
2020-10-14soc/intel/skylake/cpu.c: Fix comment coding styleAngel Pons
2020-10-14mb/google/volteer: Disable HybridStorageMode for volteer baseboardShaunak Saha
2020-10-14lib and libpayload: add 64-bit versions of clz, __ffs and log2Tim Wawrzynczak
2020-10-14mb/intel/adlrvp: Add ADL-P mainboard ASL codeSubrata Banik
2020-10-14mb/intel/adlrvp: Add ADL-P ramstage mainboard codeSubrata Banik
2020-10-14soc/intel/jasperlake: Enable CAR NEM enhanced modeAamir Bohra
2020-10-14nb/intel/x4x: Place raminit definitions in raminit.hAngel Pons
2020-10-14nb/intel/x4x: Move register headers into a subfolderAngel Pons
2020-10-14mb/purism/librem_skl: Drop DQ and DQS byte mapsAngel Pons
2020-10-14nb/intel/x4x: Clean up DMIBAR/EPBAR definitionsAngel Pons
2020-10-14soc/intel/broadwell/xhci.c: Align with Lynx PointAngel Pons
2020-10-14soc/intel/broadwell/smi.c: Drop unused functionsAngel Pons
2020-10-14soc/intel/broadwell/pcie.c: Add some null checksAngel Pons
2020-10-14haswell/lynxpoint: Align cosmetics with BroadwellAngel Pons
2020-10-14soc/intel/broadwell: Align cosmetics with Haswell/Lynx PointAngel Pons
2020-10-14soc/intel/broadwell/igd.c: Rename to gma.cAngel Pons
2020-10-14acpi/device: Add GPIO binding property for an array of GPIOsKarthikeyan Ramasubramanian
2020-10-14mb/google/dedede/var/madoo: Update DPTF settingJohn Su
2020-10-14src/ec/google/chromeec: Get Type-C Mux info from EC (TCPM)Divya Sasidharan
2020-10-14soc/intel/common/block: Enable PMC IPC driverBrandon Breitenstein
2020-10-14mb/intel/tglrvp: Enable Pcie WWAN m.2Bora Guvendik
2020-10-14mb/google/zork: Enable wake on wireless lanRob Barnes
2020-10-14soc/intel/alderlake: Enable TME for Alder LakeSubrata Banik
2020-10-14vc/intel/fsp/fsp2_0/adl: Update FSP header to version 1332.01Subrata Banik
2020-10-14soc/intel/tigerlake: Enable and use USB4 PCIe driverDuncan Laurie
2020-10-14soc/intel/common: Add SSDT generation for Intel USB4 PCIe portsDuncan Laurie