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AgeCommit message (Expand)Author
2020-11-22mb/kontron: Add Kontron mAL10 COMe module supportMaxim Polyakov
2020-11-22soc/intel/braswell/bootblock/bootblock.c: Report the FSP-T outputFrans Hendriks
2020-11-22drivers/intel/fsp1_1: Add function to report FSP-T outputFrans Hendriks
2020-11-22src/drivers/intel/fsp1_1/cache_as_ram.S: Clear _bss area onlyFrans Hendriks
2020-11-22mb/google/sarien: Configure IRQs as level triggered for HID over I2CKarthikeyan Ramasubramanian
2020-11-22mb/google/brya: Add new google brya mainboardTim Wawrzynczak
2020-11-22vc/amd/pi/00670F00: Add raw AGESA binary only to COREBOOT CBFSFurquan Shaikh
2020-11-22nb/intel/sandybridge: Clean up COMPOFST1 logicAngel Pons
2020-11-22nb/intel/sandybridge: Correct get_COMP2 functionAngel Pons
2020-11-22nb/intel/sandybridge: Rename and refactor `discover_timC_write`Angel Pons
2020-11-22nb/intel/sandybridge: Only use write Vref if supportedAngel Pons
2020-11-22nb/intel/sandybridge: Refine power-down mode logicAngel Pons
2020-11-22nb/intel/sandybridge: Lower tPRPDEN to 1Angel Pons
2020-11-22nb/intel/sandybridge: Increase tRWDRDD with fast RAMAngel Pons
2020-11-22nb/intel/sandybridge: Rename and clean up `discover_edges_write`Angel Pons
2020-11-22nb/intel/sandybridge: Relocate PREA-ACT-RD sequenceAngel Pons
2020-11-22nb/intel/sandybridge: Remove spurious writes to IOSAV BW maskAngel Pons
2020-11-22nb/intel/sandybridge: Drop `precharge` functionAngel Pons
2020-11-22mb/*: Use ACPI_DSDT_REV_2 instead of hard-coded valueFelix Singer
2020-11-22nb/intel/sandybridge: Clarify register writeAngel Pons
2020-11-22nb/intel/sandybridge: Encapsulate JEDEC write levelingAngel Pons
2020-11-22nb/intel/sandybridge: Do not rewrite write leveling sequenceAngel Pons
2020-11-22nb/intel/sandybridge: Make helper for write leveling sequenceAngel Pons
2020-11-22nb/intel/sandybridge: Run `read_mpr_training` before write trainingAngel Pons
2020-11-22nb/intel/sandybridge: Rename `read_training` functionAngel Pons
2020-11-22nb/intel/sandybridge: Use bitfield for GDCRTRAININGMOD registerAngel Pons
2020-11-22nb/intel/sandybridge: Use bitfield for GDCRCMDPICODINGAngel Pons
2020-11-22nb/intel/sandybridge: Move constants out of for-loopAngel Pons
2020-11-22nb/intel/sandybridge: Use bitfields to program MCMAIN timingsAngel Pons
2020-11-22nb/intel/sandybridge: Clean up TC_OTHP writesAngel Pons
2020-11-22nb/intel/sandybridge: Use one sequence for write levelingAngel Pons
2020-11-22mb/google/zork: update berknip CHTC thermal settingKevin Chiu
2020-11-22soc/amd: move non-CAR linker scripts to common directoryFelix Held
2020-11-22sb/intel/lynxpoint/smbus.c: Remove invalid PCI IDsAngel Pons
2020-11-21soc/amd: factor out vbnv_cmos_failed() into soc/amd/common/vbootFelix Held
2020-11-21vc/intel/fsp/fsp2_0/alderlake: Update FSP header file version to 1474_11Subrata Banik
2020-11-21mb/google/asurada: Get RAM code from ADC 3Yidi Lin
2020-11-21cbfs: Add metadata cacheJulius Werner
2020-11-21nb/intel/sandybridge: Introduce `disable_refresh_machine` functionAngel Pons
2020-11-21intel/socket_441: Increase bootblock sizeJulius Werner
2020-11-21zork: Create gumboz variantKevin Chiu
2020-11-21mb/google/zork: update DRAM table for dirinbozKevin Chiu
2020-11-21util: Add new DDR4 H5ANAG6NCJR-XNC for zork boardsKevin Chiu
2020-11-21mb/google/zork: update telemetry settings for WoomaxKane Chen
2020-11-21include/device/pci_ids: add PCI IDs for new AMD SoCsFelix Held
2020-11-20mb/google/dedede/variants/madoo: Increase TCC offset from 5 to 10John Su
2020-11-20nb/intel/sandybridge: Rename loop variableAngel Pons
2020-11-20mb/google/zork: Remove 50ms WIFI delayMartin Roth
2020-11-20intel/fsp2_0: Add soc_validate_fsp_version for FSP version checkJohnny Lin
2020-11-20mb/google/volteer/var/elemi: Update gpioWisley Chen
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