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2008-09-26Add IRQ12 to the dbm690t mptable for mouse interrupt support.Marc Jones
Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3603 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-24Support for the memory controller and PCIe interface of the IntelEd Swierk
EP80579 Integrated Processor (codename "Tolapai"). The memory controller code supports only 64-bit-wide DIMMs with x8 devices and ECC. It has been tested on a development board using a single Micron MT9HTF6472PY-667D2 DIMM. Your mileage will definitely vary with other DIMMs. Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3600 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-23This patch adds support for watchdog kill and adds it to Asus M2V-MX SE.Rudolf Marek
Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Marc Jones <marc.jones@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3595 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-23The AMD dbm690t mainboard uses the it8712f SIO with theMarc Jones
default 48MHz clock input. The Asus a8n_e uses the it8712f with a 24MHz clock input. The it8712f early init code was setting a 24MHz input clock(to support the a8n_e). Since 48Mhz is the default I added a function to set 24MHz input clock to the a8n_e. Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Rudolf Marek <r.marek@assembler.cz> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3594 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-23Attached patch removes HPET info from ACPI tables. HPET does not work fine onRudolf Marek
VT8237R (random keyboard/mouse lockups). Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Jordan Crouse <jordan.crouse@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3593 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-23Following patch adds support for Asus M2V-E SE. Works pretty well, the onlyRudolf Marek
problem left is with CPU scaling setup. No VGA - may work with the Xorg drivers recently released, maybe with OpenChrome too. It wont work with the little patch which will hop in soon Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3591 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-22Patch for AMD DBM690T board.Michael Xie
Signed-off-by: Michael Xie <Michael.Xie@amd.com> Reviewed-by: Marc Jones <marc.jones@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3590 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-22Patch for AMD SB600 chipset.Michael Xie
Most of the functions in SB600 are enabled except power management. Signed-off-by: Michael Xie <Michael.Xie@amd.com> Reviewed-by: Marc Jones <marc.jones@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3589 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-22Patch for AMD RS690 chipset.Michael Xie
All the PCIe slots are enabled in this patch except power management. Signed-off-by: Michael Xie <Michael.Xie@amd.com> Reviewed-by: Marc Jones <marc.jones@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3588 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-19Attached patch fixes at least one issue ;) During the PCI BAR sizing must ↵Rudolf Marek
be the D1F0 bridge without activated I/O and MEM resources, otherwise it will hang whole PCI bus. U-boot is also disabling the IO/MEM decode when sizing the BARs, dont know why does we not. Second small change just changes a bit which controls the PSTATECTL logic. Third change deals with the integrated VGA, which needs to be enabled early, so the VGA_EN is set along the bridges, and PCI K8 resource maps are set correctly. Finally the CPU accessible framebuffer is now disabled as it is not needed. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3587 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-19Whitespace and style cleanup. (trivial)Marc Jones
Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Marc Jones <marc.jones@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3586 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-19Add AMD K8 S1G1 socket support.Michael Xie Michael.Xie
Signed-off-by: Michael Xie Michael.Xie@amd.com Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3585 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-18ck804 whitespace fixesMyles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3584 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-18Fix whitespace in tyan s289{1,2,5} files. Also removes some #if 0 and #if 1Myles Watson
that don't seem to clarify anything. Abuild tested. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3583 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-12For the jetway jf2/4 series of mainboards:Alex Mauer
* change the comment for device f.0 from "IDE" to "SATA" * turn on firewire device a.0 * turn on pata device f.1 * don't turn on the unusable device 10.5 (built-in vt8237 ethernet?) Signed-off-by: Alex Mauer <hawke@hawkesnest.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3577 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-11From Vincent Legoll:Stefan Reinauer
Use dev_path() to have nice debug output patch is run-time tested Trivial, thus: Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3572 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-10Add the "jetway j7f[24]*" mainboard. As compared to the Via Epia CN, thisAlex Mauer
changes the superio to a Fintek F71805F as described at http://www.coreboot.org/Jetway_J7F2_Build_Tutorial It also creates the mainboard tree for this series of motherboards (Jetway J7F2 and J7F4). I've tested it with one motherboard (J7F2WE1G3), and I believe it works with the others, as the differences among them are mostly trivial (processor speed, chipset and quantity of LAN cards, audio chipset, etc.). A list of the relevant motherboards with specs can be found at http://www.jetway.com.tw/jw/ipcboard_socket.asp?platid=16 The irq_tables.c is copied directly from the epia-cn, because the one generated by getpir with the factory BIOS did not work properly while the EPIA-CN one did. Minor changes on checkin to cope with moved romcc in latest revision. NOTE: This board is broken until the issue introduced in r3567 is resolved. Signed-off-by: Alex Mauer <hawke@hawkesnest.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3571 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-05This patch adds support for the VIA VT8237S south bridge. The VT8237R ↵Rudolf Marek
programming remains unchanged (tested on mine desktop) except of reverting the small change introduced by Bari (gpio/inta setup reg 0x5b). This should go for some board specific file. The change would broke at least mine board. But seems to be needed for jakllsch. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Bari Ari <bari@onelabs.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3567 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-04This changes the python generated makefilesCarl-Daniel Hailfinger
targets/*/*/Makefile targets/*/*/normal/Makefile targets/*/*/fallback/Makefile to use a common copy of romcc, and to leave this compiler untouched by 'make clean' in targets/*/*/fallback/ and targets/*/*/normal/ . 'make clean' in targets/*/*/ will clean romcc. Thanks to Mats for the initial idea and implementation of a tool to do this. This patch has almost the same behaviour as the original tool without having to run the tool each time. Tested for abuild-friendliness. The patch saves ~10-12 seconds for every target using romcc. For a full abuild run, this is ~20% time saved. For the first 38 abuild targets, total build time is down to 13m24s instead of 16m22s on my machine. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Mats Erik Andersson <mats.andersson@gisladisker.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3564 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-03Tidy up identifiers, per Uwe's suggestion. Trivial.Ed Swierk
Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Ed Swierk <eswierk@arastra.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3563 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-01This patch gets the Epia-CN working without ACPI or APIC.Bari Ari
All devices work, no irq storms. Enjoy. Signed-off-by: Bari Ari <bari@onelabs.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3556 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-28Add definitions for DDR2 SPD registers.Ed Swierk
Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3547 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-28Eric Biederman believes that he and Tom Zimmerman of the defunctEd Swierk
LinuxNetworx own the copyright for the Intel e7520, e7525 and 3100 raminit code. Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3546 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-27If you haveWard Vandewege
option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 option CONFIG_PRECOMPRESSED_PAYLOAD=1 set in Config.lb but accidentally use an uncompressed payload, coreboot (v2) bombs out like this: elfboot: Attempting to load payload. rom_stream: 0xfffc0000 - 0xfffdefff Uncompressing to RAM 0x01000000 Decoder scratchpad too small! Decoding error = 1 Unexpected Exception: 6 @ 10:04000408 - Halting Code: 0 eflags: 00010057 eax: 00000101 ebx: 04000400 ecx: 000003d4 edx: fffc0000 edi: 04000400 esi: 04000401 ebp: 04000400 esp: 0013dfb4 The attached patch modifies v2's lzma code so that it assumes an uncompressed payload if it fails to find a properly compressed payload. Compare with the fatal error above: elfboot: Attempting to load payload. rom_stream: 0xfffc0000 - 0xfffdefff Uncompressing to RAM 0x01000000 Decoder scratchpad too small! olen = 0x00000000 done. Decompression failed. Assuming payload is uncompressed... Found ELF candidate at offset 0 header_offset is 0 Try to load at offset 0x0 If you don't have CONFIG_COMPRESSED_PAYLOAD_LZMA and CONFIG_PRECOMPRESSED_PAYLOAD set and use an uncompressed payload, things are as before: elfboot: Attempting to load payload. rom_stream: 0xfffc0000 - 0xfffdefff Found ELF candidate at offset 0 header_offset is 0 Try to load at offset 0x0 One can argue that this is a case of 'builder beware', but my counter argument is that anything that causes unexpected runtime breakage is really, really, really bad, and should be avoided where possible. This patch also fixes one erroneous comment. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3542 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-25This patch adds PCI device IDs for the Intel EP80579 Integrated Processor,Ed Swierk
and renames some existing macros for clarity. Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3536 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-25This patch modifies the Intel 3100 southbridge code to recognize theEd Swierk
integrated LPC, SMBus, USB and SATA devices of the Intel EP80579 Integrated Processor. Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3535 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-25This patch implements support for the CPU core of the Intel EP80579Ed Swierk
Integrated Processor. Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-19Add Tyan S2912 platform with AMD Family 10 support. Arne Georg Gleditsch
Thanks Arne. Good job. Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com> Acked-by: Marc Jones <marc.jones@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3526 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-13Fix outb to 0x80 delay functions to use inb instead (fixes excessive post codesStefan Reinauer
in a couple of occurences) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3509 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-12License updated to GPL v2.Marc Jones
Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3504 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-08Enable both IDE ports for our qemu target.Ward Vandewege
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3481 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-07Clean up whitespace and comments style. (trivial)Marc Jones
Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Marc Jones <marc.jones@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3480 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-04Initial support for the ASI MB-5BLGP (Neoware Eon 4000s).Uwe Hermann
This works fine in Linux if you use the 'irqpoll' kernel command line option. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3469 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-03Remove welcome message from elfboot. None of the other subsystems have theirStefan Reinauer
own welcome message. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3468 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-03fix lots of warnings for cache as ram builds (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3467 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-02adapt Uncompressing.. patch for AMD code. Also replace "linxbios" by "coreboot"Stefan Reinauer
in a number of places. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3466 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-02Go back to SIPI WAIT state for those CPUS defining the newly introducedStefan Reinauer
CONFIG_AP_IN_SIPI_WAIT flag. Newer Intel CPUs need this to operate with multiple cores. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3465 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-02This patch Stefan Reinauer
* fixes a warning * puts some debug messages to spew because they're only useful to debug CAR * print an explicit message "Uncompressing..." instad of "Copying..." when coreboot_ram.rom is compressed. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3463 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01oops, forgot these in the cleanup.. (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3461 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01a heuristics is something different Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3460 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01Typo, thanks to Idwer for spotting this. (trivial patch)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3459 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01clarify in the printks what function is actually called. This little smart magicStefan Reinauer
drove me crazy during debugging. Fix Typos. Add a warning because the on-chipset devices are hardcoded. For newer machines, a lot more memory space will have special meanings, and we can't hardcode them all in an ifdef desert. (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3458 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01clean out obsoleted config.lb rules and output, fix indenting (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3457 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01use printk, when possible. (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3456 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01match against all steppings of a CPU model, because these are _model_ drivers.Stefan Reinauer
(trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3455 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01serial.inc is not used anywhere. drop it (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3454 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01same spelling in all mtrr output.. (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3453 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01drop unused code (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3452 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01coding style fixes (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3451 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01fix compile warnings of rom_stream.c (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3450 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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