coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-06-06	mb/lenovo/t400,x200: Control SMI related FADT entries	Kyösti Mälkki
2020-06-06	mb/roda/rk9: Control SMI related FADT entries	Kyösti Mälkki
2020-06-06	mb/prodrive/hermes: Add new mainboard port	Christian Walter
2020-06-06	soc/intel/xeon_sp/cpx: set up cpus	Jonathan Zhang
2020-06-05	google/trogdor: Remove RO_FSG region	Julius Werner
2020-06-05	soc/amd/common/spi: add and use define for last FIFO position	Felix Held
2020-06-05	soc/amd/picasso: Add set_mmio_dev_ops() to set ops for MMIO devices	Furquan Shaikh
2020-06-05	sb/intel/bd82x6x: Remove dead code	Angel Pons
2020-06-04	Revert "mb/google/zork: Increase RO section to 5MB"	Raul E Rangel
2020-06-04	drivers/uart/acpi: Add new device driver for UART attached devices	Duncan Laurie
2020-06-04	acpi: Add support for writing UART device descriptors	Duncan Laurie
2020-06-04	acpi: Accomodate non-standard UUIDs in device properties	Duncan Laurie
2020-06-04	mb/google/volteer: Create voxel variant	David Wu
2020-06-04	cpu/intel/slot_1: Select 16KiB bootblock if console is enabled	Keith Hui
2020-06-04	mb/google/zork: create new variant for Vilboz	Peichao Wang
2020-06-04	soc/amd/picasso/Makefile: Allow absolute path for picasso firmware	Raul E Rangel
2020-06-04	soc/intel/xeon_sp/cpx: add chip operation and PCIe enumeration	Jonathan Zhang
2020-06-04	soc/amd/picasso: fix iomap for ACPI_PM	Kangheui Won
2020-06-03	mb/google/zork: Add HID for max98357a	Raul E Rangel
2020-06-03	drivers/generic/max98357a: Don't write device if HID is missing	Raul E Rangel
2020-06-03	soc/amd: Use mp_cpu_bus_init()	Kyösti Mälkki
2020-06-03	soc,southbridge/amd: Remove some explicit zero-initializers	Kyösti Mälkki
2020-06-03	mb/gigabyte/ga-g41m-es2l: Remove MEI PCI devices from devicetree	Arthur Heymans
2020-06-03	mb/gigabyte/ga-g41m-es2l: Add PEG to devicetree	Arthur Heymans
2020-06-03	soc/intel/quark/memmap: Add missing 'include <cpu/x86/mtrr.h>'	Elyes HAOUAS
2020-06-03	northbridge/intel/sandybridge: Mask lower 20 bits of TOLUD and TOLM in hostbr...	Furquan Shaikh
2020-06-03	northbridge/intel/sandybridge: Update hostbridge.asl to ASL2.0 syntax	Furquan Shaikh
2020-06-03	northbridge/intel/haswell: Mask lower 20 bits of TOLUD and TOLM in hostbridge...	Furquan Shaikh
2020-06-03	northbridge/intel/haswell: Update hostbridge.asl to ASL2.0	Furquan Shaikh
2020-06-03	soc/intel/jasperlake: Update C-States info	Ronak Kanabar
2020-06-03	soc/intel/icelake: Fix 16-bit read/write PCI_COMMAND register	Elyes HAOUAS
2020-06-03	soc/tigerlake: Fix 16-bit read/write PCI_COMMAND register	Elyes HAOUAS
2020-06-03	soc/intel/jasperlake: Fix 16-bit read/write PCI_COMMAND register	Elyes HAOUAS
2020-06-03	mb/aopen/dxplplusu: Control SMI related FADT entries	Kyösti Mälkki
2020-06-03	Makefile: Drop HAVE_SMI_HANDLER test for smm-class	Kyösti Mälkki
2020-06-03	mb/google/foster: Remove EC_GOOGLE_CHROMEEC stubs	Kyösti Mälkki
2020-06-03	mb/google/cyan,intel/strago: Remove EC_GOOGLE_CHROMEEC tests	Kyösti Mälkki
2020-06-03	acpi: Drop typoed __ROMC__	Kyösti Mälkki
2020-06-03	mb/bap/ode_e21XX: Drop old commented Kconfigs	Kyösti Mälkki
2020-06-03	mb/google/zork: Delete sb_fch.asl	Raul E Rangel
2020-06-03	soc/amd/picasso/acpi: Add missing eMMC device	Raul E Rangel
2020-06-03	soc/amd/picasso/acpi: Remove hardcoded FCH IRQ numbers	Raul E Rangel
2020-06-03	mb/google/hatch: Enable the CSE Lite SKU for Puff variants	V Sowmya
2020-06-03	mb/google/hatch: Modify the puff fmd files to support CSE Lite SKU	V Sowmya
2020-06-03	acpigen: Add some new helper functions	Duncan Laurie
2020-06-03	vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3197	Srinidhi N Kaushik
2020-06-03	mb/google/volteer/halvor: initialize gpio setting and update overridetree.cb	Frank Wu
2020-06-03	soc/intel/apollolake: Reinstate APL_SKIP_SET_POWER_LIMITS	Tim Wawrzynczak
2020-06-03	soc/intel/tigerlake: update elog to include CSME reset causes	derek.huang
2020-06-03	mb/google/deltaur: Change H1 I2C speed to FAST	Eric Lai