summaryrefslogtreecommitdiff
path: root/src
AgeCommit message (Collapse)Author
2013-11-21Fix error message on wrong compiles of 2065xVladimir Serbinenko
Current error message refers to sandybridge chipset. Instead error should be that 2065x needs Ibex Peak. Change-Id: I8cc8a34f496aec7af0ce95b4b65fd25e165f43fb Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4202 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-11-19Asus F2A85-M: Fix S3 memory power cut-offRudolf Marek
The power to memory is lost during the the suspend, activate the 3VSBSW# which switches the power during S3 suspend sequence. As a result resuming from suspend to RAM works now, but now the GPP ports of the Hudson southbridge are gone after resume from S3. The devices 15.0 and 15.1 are disabled (decode as ffff) and therefore anything behind them too [1]. [1] http://www.coreboot.org/pipermail/coreboot/2013-November/076620.html fam15tn hudson PCIe GPP ports off after resume Change-Id: Id953313ee4400a03a2ad8ca09e39a5e0d5f92524 Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Reviewed-on: http://review.coreboot.org/4041 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2013-11-19Add GRUB2 payload to build systemVladimir Serbinenko
Since a long time GRUB 2 is a viable payload alternative to SeaBIOS and FILO. So make it easy for coreboot users to use GRUB 2 as a payload by integrating it into coreboot’s build system, so it can be selected in Kconfig. As the last GRUB 2 release 2.00 is too old and has several bugs when used as a coreboot payload only allow to build GRUB 2 master until a new GRUB release is done. The downside is, that accidental breakage in GRUB’s upstream does not affect coreboot users. Currently the GRUB 2 payload is built with the default modules which results in an uncompressed size of around 730 kB. Compressed it has a size of 340 kB, so it should be useable with 512 kB flash ROMs. Tested with QEMU. Change-Id: Ie75d5a2cb230390cd5a063d5f6a5d5e3fab6b354 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4058 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-11-18cbfs: 64-bit cleanupsRonald G. Minnich
cbfs used u32 in a number of cases where uintptr_t was correct. This change builds for both 64-bit and 32-bit boards. Change-Id: If42c722a8a9e8d565d3827f65ed6c2cb8e90ba60 Signed-off-by: Ronald G. Minnich <rminnich@google.com> Reviewed-on: http://review.coreboot.org/4037 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-11-18cbfs: remove unused code and prototypeRonald G. Minnich
The code is wrong (it's calling ntohl on an entry point that is actually already le due to an old cbfs bug) and nothing calls it any more anyway. Change-Id: Ief2c33faf99e3d2fc410524a5aae7bde378f088b Signed-off-by: Ronald G. Minnich <rminnich@google.com> Reviewed-on: http://review.coreboot.org/4090 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-11-18qemu: set smbios entries from fw_cfgGerd Hoffmann
Qemu makes the guest uuid (qemu -uuid $uuid) available to the guest via fw_cfg. Other smbios fields can be configured in qemu using the -smbios command line switch (check the qemu manpage for details). This patch adds coreboot support for this, so the values provided by qemu will actually show up in the smbios table. Change-Id: Ifd9ae0d02749af4e7070a65eadbd1a9585a8a8e6 Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-on: http://review.coreboot.org/4086 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-18smbios: make manufacturer, product_name and uuid runtime settableGerd Hoffmann
Make manufacturer, product_name and uuid smbios fields (type 1) configurable at runtime, simliar to version and serial number. Change-Id: Ibc826225e31fa42aa944fa43632dd6a406d5c85d Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-on: http://review.coreboot.org/4085 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-11-15qemu: load acpi tables from fw_cfg.Gerd Hoffmann
Starting with release 1.7 qemu provides acpi tables via fw_cfg. Main advantage is that new (virtual) hardware which needs acpi support JustWorks[tm] without having to patch & update the firmware (seabios, coreboot, ...) accordingly. So if we find acpi tables in fw_cfg try loading them, otherwise fallback to the builtin acpi tables. Change-Id: I792232829b870ff6ed8414a3007e0af17f6c4223 Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-on: http://review.coreboot.org/4040 Tested-by: build bot (Jenkins)
2013-11-15Lenovo T60/X60: cmos.layout: Replace tabulators with spaces for consistencyPaul Menzel
Change-Id: Iec0abae8a4b18ac737e9ebb3eac219182729be0f Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/4057 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-13intel/2065x: Use TSC for udelay()Vladimir Serbinenko
For the ram init of Intel Nehalem ram init we need a udelay implementation. Use common TSC framework for it as Intel Haswell already does. Change-Id: I360a6db1ec1ba32c92698a7d6f6968c93ead5c52 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4043 Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2013-11-12AMD Hudson: Move function s3_resume_init_data to southbridgeZheng Bao
Besides the AGESA static settings, the settings in mainboard/buildOpt.c also change the final configuration. We need to make sure the settings in FchParam in resume stage are the same as they were in cold boot stage, otherwise the board can not wake up more than once. Tested on AMD/Olive Hill, AMD/Parmer and ASRock/imb-a180. (USB keyboard doesn't work when board wakes up. It is not introduced by this patch. It needs more debugging.) Change-Id: I5a5e5502080e358ffc3577dc6a40bb762844d998 Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/3932 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2013-11-11qemu: load e820 from fw_cfgGerd Hoffmann
qemu 1.7+ provides a fw_cfg file named "etc/e820" with e820-like entries for reservations and ram regions. Use it for ram detection if present, otherwise fallback to the traditional cmos method. Change-Id: Icac6c99d2a053e59dfdd28e48d1ceb3d56a61bdc Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-on: http://review.coreboot.org/4030 Tested-by: build bot (Jenkins)
2013-11-11qemu: add fw_cfg files supportGerd Hoffmann
Qemu can provide files using the firmware config interface. This is used to pass config options, virtual machine config info and option roms into the guest. This patch adds support for reading the file index and loading files from qemu. Change-Id: I57d4a734527c4117239f355121cf1fb8a390ab0d Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-on: http://review.coreboot.org/4029 Tested-by: build bot (Jenkins)
2013-11-10add memory clobber to ins{b,w,l}Gerd Hoffmann
Change-Id: Ia710eb59f23a52afba2a8ef6e0ff2b2306107245 Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-on: http://review.coreboot.org/4033 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-11-10sio1007: Properly build '.c' filesMarc Jones
Properly build the super i/o .c files. This prevents including the .c file directly in romstage, which is generally bad practice. Adding a Makefile and a .h file to include. Change-Id: I0be66e94d3062a2c4a445cee2f12ec249598dc8b Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/4014 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2013-11-10emeraldlake2: Clean up COM port enableMarc Jones
Remove the COM port enable loop. There is no need to search for the port when it is needed and known by the GPIO function. Change-Id: Ie4e533fd9e49ed9ae62b209317b4b9853ff9926a Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/4027 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-11-10console: Add hexdump32 functionMarc Jones
Add a function to display memory locations in the console logfile. Change-Id: Iddb8d2e7a24357075f32c2fdf7916ae7a732247d Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/4013 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-11-08Add new finalize functions for devices and chipsMarc Jones
Many chipset devices require additional configuration after device init. It is not uncommmon for a device early in the devicetree list to need to change a setting after a device later in the tree does PCI init. A final function call has been added to device ops to handle this case. It is called prior to coreboot table setup. Another problem that is often seen is that the chipset or mainboard need to do some final cleanup just before loading the OS. The chip finalize has been added for this case. It is call after all coreboot tables are setup and the payload is ready to be called. Similar functionality could be implemented with the hardwaremain states, but those don't fit well in the device tree function pointer structure and should be used sparingly. Change-Id: Ib37cce104ae41ec225a8502942d85e54d99ea75f Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/4012 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-05northbridge/intel/i945/raminit.c: Remove set but unused variable `reg16`Paul Menzel
Change-Id: Id4a758644a7b799e7662113c07d395e053525934 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3984 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-05southbridge/via/vt8237r/ctrl.c: Remove set but unused variable `regm3`Paul Menzel
Change-Id: I6bb652419a54b7b7190e417346581f38335425ae Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3985 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-05usbdebug: Fix build for ROMCC boardsKyösti Mälkki
Header file is not compatible with romcc, just drop it as a romstage built with romcc cannot use usbdebug anyway. Change-Id: If7f8f22d6a8fa1f02157df281f82f02b72b6a609 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4006 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-10-30southbridge/intel/i82801ix/lpc.c: Remove unused variable `dummy`Paul Menzel
Removing `-Wno-unused-but-set-variable` from `CFLAGS` the build for QEMU Q35 and Roda RK9, both using the Intel 82801Ix southbridge, fail with the following error. src/southbridge/intel/i82801ix/lpc.c: In function 'i82801ix_enable_apic': src/southbridge/intel/i82801ix/lpc.c:45:5: error: variable 'dummy' set but not used [-Werror=unused-but-set-variable] cc1: all warnings being treated as errors Removing `dummy` should be safe as GCC probably optimizes it away before anyway. That no dummy variable is used for an RCBA [1] access in Intel Lynx Point supports that this can be dropped safely. [1] root complex base address [2] src/southbridge/intel/lynxpoint/early_pch.c Change-Id: I1c138a3498228dbd025f68d5e6af0acc29ed3460 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3982 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-22vortex86ex: Defer checking PS/2 keyboard controller system flagAndrew Wu
Don't check keyboard controller system flag until before calling pc_keyboard_init(). This makes waiting time shorter. Change-Id: I2cdb533a5b25575e1717434533a60decf748f6d8 Signed-off-by: Andrew Wu <arw@dmp.com.tw> Reviewed-on: http://review.coreboot.org/3958 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-10-22usbdebug: Fix boards without EARLY_CBMEM_INITKyösti Mälkki
The main usbdebug file lib/usbdebug.c was removed from romstage build with commit f8bf5a10 but the chipset-specific parts were not, leading to unresolved symbol errors for AMD platforms. Add a silent Kconfig variable USBDEBUG_IN_ROMSTAGE for convenient use of this feature. Change-Id: I0cd3fccf2612cf08497aa5c3750c89bf43ff69be Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3983 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-19winent-mb6047: initial WIN Enterprises MB-60470 board portJonathan A. Kollasch
What works: - ACPI interrupt routing for onboard devices - onboard devices including USBs, ATAs, NICs, COM1 What almost works: - SMI720 VGA BIOS needs forthcoming VGA BIOS hooks in SeaBIOS to work Untested: - Interrupt Line Register interrupt routing - PIRQ interrupt routing - MPBIOS/MPTABLE interrupt routing - unpopulated on board revision 1A AC97 audio - unpopulated PCI-E x16 slot - unpopulated ExpressCard slot - HT expansion board Thanks to WIN Enterprises for providing boards. Change-Id: I7787f89b3ab454b668c3b75d0d1cde55b8d53c48 Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/3975 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2013-10-19winent-mb6047: copy tyan/s2891 mainboard directoryJonathan A. Kollasch
Change-Id: I382e30c92a4c428ec53dd959a5fda4927797fb9b Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/3974 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-10-18get_bus_conf.c: reindent with indentPaul Menzel
Change-Id: Ia0c37339aa69b92a1b518fa5e49adc4a7628ae5d Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3979 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2013-10-17arch/x86/Makefile.inc: Pass $(AS) and $(CPP) to SeaBIOSAndrew Wu
SeaBIOS’ Makefile requires cpp (C Preprocessor) to build. Modify the xcompile script to search for cpp program path, and pass it to SeaBIOS’ `Makefile.inc`. Also pass the program path for as (GNU assembler). This is needed, so the crossgcc toolchain to build the SeaBIOS payload under Mac OSX. OSX ships a cpp program, but it works differently from GNU CPP, so we need to override it. Change-Id: If996ffbb76ec4bd16079b54b41f3fac07bfe25be Signed-off-by: Andrew Wu <arw@dmp.com.tw> Reviewed-on: http://review.coreboot.org/3896 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
2013-10-15CBMEM: Define cbmem_top() just once for x86Kyösti Mälkki
It is expected this will always be a casted get_top_of_ram() call on x86, no reason to do that under chipset. Change-Id: I3a49abe13ca44bf4ca1e26d1b3baf954bc5a29b7 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3972 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-15Have option of timestamps, CBMEM console and usbdebug for most boardsKyösti Mälkki
As boards without EARLY_CBMEM_INIT do not initialize CBMEM in romstage, and have no CAR migration, these features are available for ramstage only. Change-Id: Ic3f77ccdedd4e71ba693619c02c9b98b328a0882 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3970 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-15CBMEM: Fail builds on missing get_top_of_ram()Kyösti Mälkki
Dummy get_top_of_ram() is removed from romstage to fail already at build-time for cases where cbmem_initialize() would not complete. The mechanisms behind CAR_GLOBAL migration only work correctly when romstage can succesfully make the cbmem_initialize() call. Change-Id: I359820fb196ef187b9aa2e8a3e8f658a0550f237 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3969 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-15intel/i82371: Remove HAVE_ACPI_RESUMEKyösti Mälkki
This is needed to apply a rule that get_top_of_ram() in romstage is required to select HAVE_ACPI_RESUME, otherwise chipset/board has no means to backup low memory to CBMEM on s3 resume. Only board affected is asus/p2b. Change-Id: Ia5cbf4e5e40af25f52a19de584d8bc5370487154 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3971 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-15timestamps: Fix some lost timestamps for romstageKyösti Mälkki
Timestamps from cbfs_and_run, TS_START_COPYRAM and TS_END_COPYRAM, were lost with commit b766b1c7. Reason is variable ts_table was referencing CAR storage after CAR is torn doesn. Add use of car_get_var() / car_set_var() so the references go to migrated storage in CBMEM. Change-Id: I5a942ad7fd59a04e3a5255f4a3636d37dcfc1591 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3967 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-15AMD Olive Hill: Disable NoSnoopEnable to fix HDMI audio corruptions with UbuntuWANG Siyuan
Ubuntu's HDMI audio has noise and echo. Disable NoSnoopEnable can resolve this issue. I have tested on Ubuntu 13.04 with AMD Catalyst 13.4 Proprietary Linux Display Driver[1]. [1]. http://support.amd.com/us/gpudownload/linux/Pages/radeon_linux.aspx Change-Id: I5d2dddb1b7469d56cd64e3c1e0f4c6c6f095b4ab Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com> Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Reviewed-on: http://review.coreboot.org/3934 Tested-by: build bot (Jenkins) Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
2013-10-15ASRock IMB_A180: fix Ubuntu HDMI audio issueWANG Siyuan
Ubuntu's HDMI audio has noise and echo. Disable NoSnoopEnable can resolve this issue. I have tested on Ubuntu 13.04 with latest graphic driver. Change-Id: I09c19b8925eedee03cfb1d8c0831a84e8aeeba4f Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com> Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Reviewed-on: http://review.coreboot.org/3937 Tested-by: build bot (Jenkins) Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
2013-10-15AMD Olive Hill: fix Windows 7 HDMI audio issueWANG Siyuan
Windows 7 cannot find HDMI audio device because of acpi setting. I have tested on Windows 7. I can play music. Change-Id: I90ade7e7be79f65783922333c2cbb2d3cc6557ea Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com> Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Reviewed-on: http://review.coreboot.org/3933 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-10-15vendorcode/amd/agesa/f16kb: Update Kabini PI from v1.0.0.0 to v1.0.0.7WANG Siyuan
The platform initialization (PI) code v1.0.0.7 for Kabini has some enhancements like ECC DIMM support, new CPU microcode rev 0700010B, FCH bug fix (RTC) and so on. Use the name Kabini instead of Kerala everywhere. Note, the former PI code was indeed version v1.0.0.0 instead of v0.0.1.0 as used in `AGESA_VERSION_STRING`. Change-Id: I186de1aef222cd35ea69efa93967a3ffb8da7248 Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com> Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com> Reviewed-on: http://review.coreboot.org/3935 Tested-by: build bot (Jenkins) Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2013-10-14Revert "CBMEM: Always have early initialisation"Kyösti Mälkki
This reverts commit de1fe7f655c549e8dce5b34218221890fa5ccc34. While things appeared to work, there were actually invalid references to CAR storage after CAR was torn down on boards without EARLY_CBMEM_INIT. It was discussed use of CAR_GLOBAL should be restricted to boards that handle CAR migration properly. Change-Id: I9969d2ea79c334a7f95a0dbb7c78065720e6ccae Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3968 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-14ck804: hide IOAPIC base address in PCI_BASE_ADDRESS_1Jonathan A. Kollasch
Linux unhelpfully "fixes" the value in PCI_BASE_ADDRESS_1 when it is 0xfec00000 (that is, outside the range of bus 0 address space). This causes IOAPIC interrupts to fail to work under Linux. This issue was originally unnoticed by me when testing as sanity checking such as this is not done by NetBSD. Hiding the IOAPIC BAR is done by the OEM BIOS on the ck804 boards I've checked. Change-Id: I736db163750f709d68c988fac075597a50b29ab7 Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/3963 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-10-14ck804: obtain stored IOAPIC address from allocator instead of registerJonathan A. Kollasch
Change-Id: Ibdd438455a545aa9266b0fd893d5ff27124ab22c Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/3961 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-10-14ck804: obtain I/O APIC base address for ACPI MADT from allocatorJonathan A. Kollasch
Change-Id: I67192c8ae99e396ea4b17e03c658f31dbb5c1800 Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/3960 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-10-13dmp/vortex86ex: Initialize PS/2 keyboard.Andrew Wu
Call pc_keyboard_init function in southbridge. It makes PS/2 keyboard work in coreinfo payload. Change-Id: Idb79f87b09eeeade94e966fb8769dec7578e2cf5 Signed-off-by: Andrew Wu <arw@dmp.com.tw> Reviewed-on: http://review.coreboot.org/3957 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-10-13northbridge/amd/amdk8/raminit_f_dqs.c: Remove unused variable `reg` in ↵Paul Menzel
`setup_mtrr_dqs()` Change-Id: I7fc7819c329c058472031e82237be5c170b277f4 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3965 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
2013-10-13ck804 lpc: use PCI_BASE_ADDRESS_1 instead of 0x14Jonathan A. Kollasch
Change-Id: I752a4a890e1f610651a2c688cf42350ce8e9deaa Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/3962 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2013-10-13Rename cpu/x86/car.h to arch/early_variables.hStefan Reinauer
and add an ARMv7 version. Change-Id: I14fbff88d7c2b003dde57a19bf0ba9640d322156 Signed-off-by: Stefan Reinauer <reinauer@google.com> [km: rebased fa004acf8 from chromium git] Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3939 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2013-10-12Nvidia boards: acpi_tables.c: Remove intermediate variable in ACPI interrupt ↵Jonathan A. Kollasch
routing initialization Change-Id: I6cb4ad5ea5ad40284f8e88ff440f2605d3b83359 Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/3959 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins)
2013-10-07AMD hudson yangtze: Fix corruption of a global ramstage variableKyösti Mälkki
A late for loop may reference over the current array allocation and corrupt an unrelated global variable. As a quick fix bumb the size of the array allocation uniformly to 6. We missed these boards for commit 9c7d73ca because the arrays had been renamed. Change-Id: Iff2f2a0090d9302576bc72195d2a3f6fa37ce29a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3954 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2013-10-03cpu/x86/mtrr/mtrr.c: Remove superfluous assignment to `type_index`Paul Menzel
When building coreboot with the Clang static analyzer scan-build, it reports »Value stored to 'type_index' is never read«. Indeed, in `memranges_each_entry()` `type_index` is assigned a value before being read. So remove that line. Change-Id: I6da2fb8be7157bb98c57281babd4a08ca0d9f7a7 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3953 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-01qemu: q35: avoid address conflictGerd Hoffmann
Qemu has the fw_cfg interface at 0x510, which conflicts with power management base address in coreboot. Move the pmbase to a non-conflicting address. No need to worry about speedstep, it is not supported by qemu and isn't enabled in the qemu config. Change-Id: I3e87d8301988028ca0ea7d96c08b4e26ac15a7c2 Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-on: http://review.coreboot.org/3938 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-09-28exynos5420: Fix build warningAllen Martin
Fix "set but not used" variable warning with gcc 4.7.3 Change-Id: Ia27291ecb4f993c4ba6f29b134167dc23a449bf5 Signed-off-by: Allen Martin <amartin@nvidia.com> Reviewed-on: http://review.coreboot.org/3949 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Gabe Black <gabeblack@chromium.org>
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-10 03:35:43 +0000