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AgeCommit message (Expand)Author
2016-08-06soc/intel/skylake: Add Kabylake device IdsRizwan Qureshi
2016-08-06google/reef: Enable I2C2 for use in bootblockDuncan Laurie
2016-08-06acpi: Generate object for coreboot table regionDuncan Laurie
2016-08-06drivers/intel/fsp1_1: only set a base address for FSP in COREBOOT CBFSAaron Durbin
2016-08-05drivers/intel/fsp2_0: Ensure EC is in right mode before memory initFurquan Shaikh
2016-08-05google/reef: Correct SD card pins configChiranjeevi Rapolu
2016-08-05soc/intel/quark: Add missing breaksLee Leahy
2016-08-05drivers/spi: Add support for Micron N25Q128AWerner Zeh
2016-08-05drivers/intel/fsp2_0: Add checklist supportLee Leahy
2016-08-05soc/intel/quark: Add bootblock_c_entryLee Leahy
2016-08-05soc/intel/quark: Clean up debug output levelsLee Leahy
2016-08-05soc/intel/quark: Disable FSP serial outputLee Leahy
2016-08-05soc/intel/quark: Add FSP 2.0 romstage supportLee Leahy
2016-08-05soc/intel/quark: Add FSP 2.0 boot block supportLee Leahy
2016-08-04sb/amd/sb700: Do not reset fifo after skipping the sent bytesTimothy Pearson
2016-08-04chromeec: Chrome EC firmware source selection for EC and PD firmwaresPaul Kocialkowski
2016-08-04src/arch/riscv/id.S: Don't hardcode the stringsJonathan Neuschäfer
2016-08-04soc/apollolake: Return correct wake status in _SWSShaunak Saha
2016-08-04soc/intel/apollolake: Configure gpio ownershipJagadish Krishnamoorthy
2016-08-04google/reef: Add GPIO changes to assert SLP_S0/Reset signalShankar, Vaibhav
2016-08-04soc/intel/skylake: Correct address of I2C5 DeviceBarnali Sarkar
2016-08-04lib/timestamp: Add timestamps to CBMEM in POSTCAR stageFurquan Shaikh
2016-08-03lenovo/x60: Fetch 16 bits when trying to parse bit 13Patrick Georgi
2016-08-03sb/amd/sb[6|7|8]00: Initialize PICTimothy Pearson
2016-08-03spi/tpm: read TPM version in larger chunksVadim Bendebury
2016-08-03google/gale: Add more board ID variantsKan Yan
2016-08-03google/gru: Add code to support I2C TPM for KevinJulius Werner
2016-08-03google/gru: Add support for Gru rev1Julius Werner
2016-08-03soc/intel/quark: Support access to CPU CR registersLee Leahy
2016-08-03mainboard/intel/galileo: Add FSP 2.0 Kconfig supportLee Leahy
2016-08-03soc/intel/quark: Add header files for FSP 2.0Lee Leahy
2016-08-03soc/intel/quark: Prepare for FSP2.0 supportLee Leahy
2016-08-03soc/intel/quark: Initialize MTRRs in bootblockLee Leahy
2016-08-03soc/intel/quark: Remove use of EDK-II macros and data typesLee Leahy
2016-08-03fsp_broadwell_de: Add DMAR table to ACPIWerner Zeh
2016-08-03ACPI: Add code to create root port entry in DMAR tableWerner Zeh
2016-08-03ACPI: Add code to include ATSR structure in DMAR tableWerner Zeh
2016-08-03mainboard/intel/galileo: Remove use of EDK-II macros & data typesLee Leahy
2016-08-03soc/intel/quark: Make ramstage relocatableLee Leahy
2016-08-03drivers/intel/fsp2_0: Update the debug levelsLee Leahy
2016-08-03drivers/intel/fsp2_0: Remove fsp_print_upd_info declarationLee Leahy
2016-08-03drivers/intel/fsp2_0: Disable display of FSP headerLee Leahy
2016-08-03drivers/intel/fsp2_0: Handle FspNotify callsLee Leahy
2016-08-03drivers/intel/fsp2_0: FSP driver handles all FSP errorsLee Leahy
2016-08-03drivers/intel/fsp2_0: Verify HOBs returned by FspMemoryInitLee Leahy
2016-08-03drivers/intel/fsp2_0: Add display HOB supportLee Leahy
2016-08-03drivers/intel/fsp2_0: Add UPD display supportLee Leahy
2016-08-03drivers/intel/fsp2_0: Monitor FSP setting of MTRRsLee Leahy
2016-08-02arch/riscv: Add include/arch/barrier.hJonathan Neuschäfer
2016-08-02google/lars & intel/kunimitsu: Disable EC buildMartin Roth